Ceva-SensPro is a family of DSP cores architected to combine vision, Radar, and AI processing in a single architecture.
- DSP Core
Ceva-SensPro is a family of DSP cores architected to combine vision, Radar, and AI processing in a single architecture.
Image signal processor to advance vision systems for IoT and embedded markets
The Arm Mali-C55 image signal processor (ISP) is designed to support IoT and embedded applications where energy-efficient, high-q…
The videantis processors are the most efficient deep learning, computer vision, signal processing, and video coding processing so…
Machine vision and deep learning are being embedded in integrated SoCs and expanding into high-volume applications such as automo…
Hyper-Bandwidth Multichannel Memory Subsystem
Hyper-Bandwidth Multi-Channel - The fastest, most observable LPDDR3 subsystem you can drop into an SoC Supports an aggressive ban…
UHD Image Signal Processing (ISP) Pipeline
The logiISP-UHD Image Signal Processing Pipeline IP core is an Ultra High Definition (UHD) ISP pipeline designed for digital proc…
Video and Image Processing Suite
The Intel FPGA Video and Image Processing Suite is a collection of Intel FPGA intellectual property (IP) functions that you can u…
scalable and silicon-agnostic implementation of the MIPI Camera Serial Interface 2 version 4.1 The MIPI CSI-2 IP core is a scalab…
The Ceva-NeuPro-Nano is a efficient and self-sufficient Edge NPU designed for Embedded ML applications.
Ceva-NeuPro Studio is a comprehensive software development environment designed to streamline the development and deployment of A…
First DSP for embedded vision and AI with millions of units shipped in the market The Cadence® Tensilica® Vision P6 DSP, introduc…
Built using 1024-bit SIMD and offering up to 3.84TOPS of performance The Cadence® Tensilica® Vision Q8 DSP delivers up to 3.84 te…
Built on our latest Xtensa NX architecture and offers up to 2.18TOPS of performance The Cadence® Tensilica® Vision Q7 DSP deliver…
Ethernet Real-Time Publish-Subscribe (RTPS) IP Core
The Real-Time Publish-Subscribe (RTPS) core provides a hardware IP solution for the Ethernet RTPS protocol.
Fibre Channel ASM (Anonymous Subscriber Messaging) Core
The Fibre Channel Avionics Environment Anonymous Subscriber Messaging (FC-AE-ASM) core provides a hardware IP solution for the FC…
ARINC 818 Direct Memory Access (DMA) IP Core
ARINC 818 is a point-to-point serial protocol primarily used in avionics applications and supports the transmission of video, aud…
64-bit RISC-V Multicore Processor with 1024-bit Vector Extension
AndesCore™ AX45MPV 64-bit multicore CPU IP is an 8-stage superscalar processor with Vector Processing Unit (VPU) based on AndeSta…
64-bit CPU with RISC-V Vector Extension
The 64-bit NX27V is a vector processor with 5-stage scalar pipeline that supports the latest RISC-V specification, including the …
64 bit RISC-V Multicore Processor with 2048-bit VLEN and AMM
AndesCore™ AX46MP(V) 64-bit multicore CPU IP is an 8-stage superscalar processor with Vector Processing Unit (VPU) based on AndeS…
32 bit RISC-V Multicore Processor with 256-bit VLEN and AMM
AndesCore™ A46MP(V) 32-bit multicore CPU IP is an 8-stage superscalar processor with Vector Processing Unit (VPU) based on AndeSt…