Silicon agnostic implementation of the structure agnostic mapping method described in the IEEE 1914.3 standard The Radio Over Eth…
- Ethernet
- Mature
- Available
- IEEE 1914.3-2018
Silicon agnostic implementation of the structure agnostic mapping method described in the IEEE 1914.3 standard The Radio Over Eth…
Up to 1,500 MIPS @ 200 Mhz clock frequency for high data processing speed and precise process control The Generic Timer IP module…
High Performance Second Generation Extended MIPI CSI2 Receiver
Latest and forthcoming CMOS image sensors surpass 10M pixels, and output video at 30 and even 60 fps.
H.265/HEVC 422 10bit Decoder for 4K
DMNA realizes real time Encoding of 4K (3840 x 2160) and 8K (7680 x 4320) / 60fps video stream compliant with H.265 / HEVC
H.265/HEVC 422 10bit Encoder for 4K
DMNA realizes real time Encoding of 4K (3840 x 2160) and 8K (7680 x 4320) / 60fps video stream compliant with H.265 / HEVC
I²S Controller is designed to transfer audio data to and from Audio codec.
CAN 2.0 & CAN FD Bus Controller IP
The CAN is a standalone controller for the Controller Area Network (CAN), which is commonly used in automotive and industrial app…
Configurable CAN Bus Controller
The core is a standalone controller for the Controller Area Network (CAN), widely used in automotive and industrial applications.
High-performance 32-bit RISC CPU
The eSi-3250 32-bit CPU is targeted specifically for applications with high performance requiring caching, due to the use of slow…
Compact, low-power 32-bit RISC CPU
The eSi-3200 32-bit CPU is the mid-range member in the eSi-RISC family of processor cores.
UART with FIFOs, IrDA and Synchronous CPU Interface
The H16750S is a standard UART providing 100% software compatibility with the popular Texas Instruments 16750 device.
Configurable CAN Bus Controller IP with Flexible Data-Rate
The Controller Area Network (CAN) is widely used in automotive and industrial applications.
Protocol controller IP for CAN / CAN FD
The M_CAN module is the new CAN Communication Controller IP-module that can be integrated as stand-alone device or as part of an …
64 bit RISC-V Multicore Processor with 2048-bit VLEN and AMM
AndesCore™ AX46MP(V) 64-bit multicore CPU IP is an 8-stage superscalar processor with Vector Processing Unit (VPU) based on AndeS…
LeWiz provides a range of direct memory access controllers (DMA) and bus bridge IP cores.
Configurable UART with FIFO, hardware and software flow control
The D16752 is a universal asynchronous receiver/transmitter (UART) with 64-byte FIFOs and automatic hardware/software flow contro…
Configurable UART with FIFO and hardware flow control
The D16750 is a soft Core of a Universal Asynchronous Receiver / Transmitter (UART), functionally identical to the TL16C750.
DMA Controller with TileLink IIP
DMA Controller with TileLink interface is full featured, easy-to-use, synthesizable design that can be used with TileLink based s…
DMA Controller with OCP interface is full featured, easy-to-use, synthesizable design that can be used with OCP based systems as …
DMA Controller with AXI interface is full featured, easy-to-use, synthesizable design that can be used with AXI based systems as …