Vendor: System Level Solutions, Inc. Category: USB

USB 10Gbps Device Controller

Leveraging the benefits of USB 3.2 Gen 1 device controller, USB 3.2 Gen 2 is designed using the FPGA built-in transceiver.

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Overview

Leveraging the benefits of USB 3.2 Gen 1 device controller, USB 3.2 Gen 2 is designed using the FPGA built-in transceiver. It is a one-stop solution for all USB requirements ranging from USB 3.2 to USB 2.0. It supports SuperSpeed+ (SSP), SuperSpeed (SS), High Speed (HS) and Full Speed (FS) communication modes. The Core architecture allows to use minimal pins from FPGA for USB 3.2 interface with better stability. It provides USB 2.0 backward compatibility using an external USB 2.0 ULPI PHY.

It has been designed to provide simplicity and flexibility along with highest throughput i.e. >8.5Gbps. Avalon/AXI/AHB Lite interface allows to manage the control transfer using software, provides flexibility, while FIFO interface allows to transfer the data over non-control endpoint ensuring highest throughput.

FPGA Supported:

 FPGA  Supported Device Family
 Intel

 Agilex 7, Cyclone 10, Arria 10,

Stratix 10, Cyclone V1, Arria V1,

Stratix V1
 Microchip  PolarFire, PolarFire SoC
 Lattice Semiconductor  CrossLink-NX1, Certus Pro NX1

Note:

  1. Supports up to Gen1 mode.

Key features

  • USB 3.2 Specific Features
    • Supports SuperSpeedPlus (SSP - USB 3.2 Gen 2) mode and ports SuperSpeed (SS - USB 3.2 Gen 1) mode
    • Uses FPGA Transceiver as a PHY layer and thus eliminates need for external PHY for USB 3.2
  • USB 2.0 Specific Features
    • Supports High Speed (HS) and Full Speed (FS) modes
    • Provides well-known ULPI interface to interact with external USB 2.0 PHY
  • Ease of Use
    • Ready to use component
    • Simple FIFO interface to transfer data over non-control endpoint
  • Flexibility
    • Capable to support up to 31 endpoints (1 default control endpoint, 15 IN endpoints and 15 OUT endpoints)
    • Allows to select number of buffers per endpoint based on the requirement

Block Diagram

IPRUSB3SFP005 block diagram

Benefits

  • No need for external PHY for USB 3.1 Gen 1 and Gen 2 interface
  • Uses in-built transceiver as PHY layer
  • Requires less pins compared to external PHY

Applications

  • Imaging Device
  • Storage Devices
  • Machine Vision
  • Data Centers

Video

SLS eUSB 3.1 Gen 2 Device IP Core Performance on Arria 10 FPGA
This video demonstrates the SLS USB 3.1 Gen 2 Device IP Core achieving a throughput of over 8.5 Gbps using the built-in transceiver of Intel Arria 10 FPGAs.

Files

Product Sheet Download

Note: some files may require an NDA depending on provider policy.

Specifications

Identity

Part Number
IPRUSB3SFP005
Vendor
System Level Solutions, Inc.

Provider

System Level Solutions, Inc.
HQ: USA
With a strong focus on smart energy, industrial IoT, and utility-grade wireless solutions - covering metering, integration of micro generation, field operations, consumer devices, and a cloud-based open-standards for the Internet of Things (IoT) platform, SLS has successfully established as an international technology provider to multiple sectors. SLS has broadened its wings to a global operation across three continents (America, Europe and Asia), which includes more than 250 trained engineering professionals in India and they are responsible for FPGA design, PCB development, prototype development, software development, software applications, and manufacturing. Through long established relationships with organizations such as Altera, Toshiba, Hitachi, Telefonica, Intel, Dell, BHEL and many others, SLS has earned a top-notch reputation as a products and services provider. In recent years, SLS helped the UK governments for developing Smart Cities program by assisting SmartDCC and Telefonica with test products and infrastructure as well as assisting companies like EDMI and Toshiba for communications hubs and smart metering devices. With a unique in-house agile capability to rapid development prototype and proof of concepts covering hardware, firmware, software and wireless - and transition to scale without traditional overheads, SLS is the agile technology product and solution partner of choice for industry.
Contact System Level Solutions, Inc.

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Frequently asked questions about USB IP cores

What is USB 10Gbps Device Controller?

USB 10Gbps Device Controller is a USB IP core from System Level Solutions, Inc. listed on Semi IP Hub.

How should engineers evaluate this USB?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this USB IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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