Overview
Universal Flash Storage (UFS) is a simple, high performance, mass storage device with a serial line interface. UFS is designed to be the most advanced specification for flash memory-based storage in mobile devices such as smartphones and tablets computers. It is primarily for use in mobile systems, between host processing and mass storage memory devices.
The Hardware Validation Platform (HVP) is a platform for UFS Host Controller that is fully compliant with the UFS standard specification version 1.0. UFS Host controller (HVP) contains everything you need to launch your products in the possible shortest time frame.
The HVP contains the UFS Host-based system, software drivers and documentation are preloaded on the system. A monitor, standard USB keyboard and mouse are required.
Arasan UFS Host Controller Version 1.0 HVP supports both 3.3V and 1.8V signaling. The ArasanUFS HVP handles UFS Host Protocol at transmission-level, packing data and checking for transaction format correctness.
Learn more about UFS Controller IP core
In the world of mobile and embedded electronics, storage is no longer just about capacity; it’s about how fast that data can move. As we transition into an era of on-device AI and 8K video, the standards we rely on—UFS, eMMC, and NAND—are evolving rapidly.
UniversalFlash Storage (UFS) was created for mobile applications and computer systems requiring high performance and low power consumption. These systems typically use embedded Flash based on the JEDEC standard eMMC. UFS was defined by JEDEC as the evolutionary replacement for eMMC offering significantly higher memory bandwidth. The standard builds on existing standards such as the SCSI command set, the MIPI Alliance M-PHY and UniPro as well as eMMC form factors to simplify adoption and development.
Universal Flash Storage (UFS) was created for mobile applications and computer systems requiring high performance and low power consumption. These systems typically use embedded Flash based on the JEDEC standard eMMC. UFS was defined by JEDEC as the evolutionary replacement for eMMC offering significantly higher memory bandwidth. The standard builds on existing standards such as the SCSI command set, the MIPI Alliance M-PHY and UniProSM as well as eMMC form factors to simplify adoption and development.
The emerging MIPI standards are designed to ensure interoperability among devices and software that are used in products for the exploding hand-held market. The standards facilitate the interconnection of multiple, mixed-signal integrated circuit devices on a single hand-held product. Use of the standards ensures low power, low pin count and interoperability of all the devices in the system and easy integration.
As the system, software & IP complexity is increasing so is the demand of SystemC models & Virtual Platform for verification. To achieve it, the key requirements are that the models/platform should be developed fast, reusable & highly accurate. We are sharing the experience of our company 3D-IP Semiconductors Ltd. for the development of a generic Virtual Platform using TLM 2.0; reusable for any system model.
With the rapid development of modern mobile systems there is a great increase in the complexity involved in the IP and SOC designs and correspondingly the functional verification also becomes a challenge. To reduce time to market, IPs needed for the SOC must be developed in parallel to the top level design and should be verified in parallel. This requires strong methodology and infrastructure support which allows the SOC design team to be aligned on the requirements with IP teams. Methodology should also ensure that SOC design team gets the required data for the IP to proceed with the complexity of SOC design.
