Vendor: SmartDV Technologies Category: Test / Debug

Serial Flash Verification IP

Serial Flash is the serial synchronous communication protocol based Flash VIP, supporting all major Serial Flash vendors.

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Verification IP View all specifications

Overview

Serial Flash is the serial synchronous communication protocol based Flash VIP, supporting all major Serial Flash vendors. Serial Flash VIP can be used to verify Serial Flash Master or Slave in SOC. It can work with Verilog HDL environment and works with all Verilog simulators that are support SystemVerilog.

Serial Flash Verification IP is supported natively in SystemVerilog, VMM, RVM, AVM, OVM, UVM, Verilog, SystemC, VERA, Specman E and non-standard verification env

Serial Flash Verification IP comes with optional Smart Visual Protocol Debugger (Smart ViPDebug), which is GUI based debugger to speed up debugging.

Key features

  • Follows Serial Flash specification as defined in WINBOND, MICRONIC, MACRONIX, MICRON, SPANSION, Silicon Storage technology (SST) and many more.
  • Supports software and hardware Reset
  • Supports quad peripheral interface (QPI) reduces instruction overhead
  • Supports allows true XIP (execute in place) operation
  • Supports program 1 to 256 byte per programmable page
  • Supports erase/program suspend & resume
  • Supports software and hardware write-protect
  • Supports discoverable parameters (SFDP) register
  • Supports volatile & non-volatile Status Register Bits
  • Supports advanced security features
  • Supports 3-wire,4-wire interface
  • Supports baud rate selection
  • Supports burst modes
  • Supports fast read and byte program
  • Supports block/sector protection
  • Supports flexible erase operation like,
    • 4KByte sector erase
    • 32KByte block erase
    • 64KByte block erase
  • Supports internal clock division check
  • Supports software write protection.
  • Supports security ID
  • Supports on the fly generation of data
  • Supports backdoor initialization of data
  • Supports constraints Randomization
  • Built in functional coverage analysis
  • Supports Callbacks in master, slave and monitor for modifying, and sampling data/cmd on bus.
  • Notifies the test bench of significant events such as transactions, warnings, and protocol violations. This can be written to separate log files.
  • Serial Flash Verification IP comes with complete testsuite to test every feature of Serial Flash specification

Block Diagram

Serial Flash VIP block diagram

Benefits

  • Faster testbench development and more complete verification of Serial Flash designs.
  • Easy to use command interface simplifies testbench control and configuration of slave and master.
  • Simplifies results analysis.
  • Runs in every major simulation environment

What’s Included?

  • Complete regression suite containing all the Serial Flash testcases.
  • Examples showing how to connect various components, and usage of Master, Slave and Monitor.
  • Detailed documentation of all class, task and function's used in verification env.
  • Documentation contains User's Guide and Release notes.

Specifications

Identity

Part Number
Serial Flash VIP
Vendor
SmartDV Technologies
Type
Verification IP

Files

Product Sheet Download

Note: some files may require an NDA depending on provider policy.

Provider

SmartDV Technologies
HQ: India
At SmartDV Technologies™, we believe there’s a better way to approach semiconductor intellectual property (IP) for integrated circuits. We’ve been focused exclusively on IP since 2007—so whether you’re sourcing standards-based design IP for your next SoC, ASIC, or FPGA, or seeking verification solutions (VIP) to put your chip design through its paces, you’ll find SmartDV’s IP straightforward to integrate. By combining proprietary SmartCompiler™ technology with the knowledge of hundreds of expert engineers, SmartDV can customize IP to meet your unique design objectives: quickly, economically, and reliably. Don’t allow other suppliers to force onesize-fits-all cores into your chip design. Get the IP you need, tailored to your specifications, with SmartDV: IP Your Way.
Contact SmartDV Technologies

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Frequently asked questions about SerDes Test / Debug IP cores

What is Serial Flash Verification IP?

Serial Flash Verification IP is a Test / Debug IP core from SmartDV Technologies listed on Semi IP Hub.

How should engineers evaluate this Test / Debug?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Test / Debug IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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