Vendor: SmartDV Technologies Category: DDR

SDRAM Synthesizable Transactor

SDRAM Synthesizable Transactor provides a smart way to verify the SDRAM component of a SOC or a ASIC in Emulator or FPGA platform.

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Overview

SDRAM Synthesizable Transactor provides a smart way to verify the SDRAM component of a SOC or a ASIC in Emulator or FPGA platform. The SmartDV's SDRAM Synthesizable Transactor is fully compliant with standard 512Mb_sdr & HY57V56820FT-H.pdf Specification and provides the following features.

Key features

  • Supports 100% of SDRAM protocol standard 512Mb_sdr & HY57V56820FT-H
  • Supports internal banks for hiding row access/precharge
  • Supports programmable burst lengths: 1, 2, 4, 8, or full page
  • Supports auto precharge, includes concurrent auto precharge and auto refresh modes
  • Supports self refresh mode
  • Supports auto refresh
  • Supports programmable clock frequency of operation
  • Supports all types of timing and protocol violation detection
  • Supports all mode registers programming
  • Supports speed grade:
    • 7E
    • 75
  • Supports all the SDRAM commands as per the 512Mb_sdr & HY57V56820FT-H
  • Checks for following:
    • Check-points include power on, initialization and power off rules
    • State based rules, active command rules
    • Read/Write commands rules etc
    • All timing violations
  • Models, detects and notifies the test bench of significant events such as transactions, warnings, timing and protocol violations

Block Diagram

SDRAM Transactor block diagram

Benefits

  • Compatible with testbench writing using SmartDV's VIP
  • All UVM sequences/testcases written with VIP can be reused
  • Runs in every major emulators environment
  • Runs in custom FPGA platforms

What’s Included?

  • Synthesizable transactors
  • Complete regression suite containing all the SDRAM testcases
  • Examples showing how to connect various components, and usage of Synthesizable Transactor
  • Detailed documentation of all DPI, class, task and function's used in verification env
  • Documentation contains User's Guide and Release notes

Files

Product Sheet Download

Note: some files may require an NDA depending on provider policy.

Specifications

Identity

Part Number
SDRAM Transactor
Vendor
SmartDV Technologies
Type
Silicon IP

Provider

SmartDV Technologies
HQ: India
At SmartDV Technologies™, we believe there’s a better way to approach semiconductor intellectual property (IP) for integrated circuits. We’ve been focused exclusively on IP since 2007—so whether you’re sourcing standards-based design IP for your next SoC, ASIC, or FPGA, or seeking verification solutions (VIP) to put your chip design through its paces, you’ll find SmartDV’s IP straightforward to integrate. By combining proprietary SmartCompiler™ technology with the knowledge of hundreds of expert engineers, SmartDV can customize IP to meet your unique design objectives: quickly, economically, and reliably. Don’t allow other suppliers to force onesize-fits-all cores into your chip design. Get the IP you need, tailored to your specifications, with SmartDV: IP Your Way.
Contact SmartDV Technologies

Learn more about DDR IP core

Which DDR SDRAM Memory to Use and When

This whitepaper provides an overview of the JEDEC memory standards to help SoC designers select the right memory solution, including IP, that best fits their application requirements.

Frequently asked questions about DDR Controller IP cores

What is SDRAM Synthesizable Transactor?

SDRAM Synthesizable Transactor is a DDR IP core from SmartDV Technologies listed on Semi IP Hub.

How should engineers evaluate this DDR?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this DDR IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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