Vendor: Agile Analog Category: Comparator

Low Power Comparator

The agileCMP_LP is a comparator suitable for use in any low power system.

Contact Provider Request Datasheet

Overview

The agileCMP_LP is a comparator suitable for use in any low power system. It is designed to provide a flexible range of comparison voltages suitable for many sensor interface designs. The agileCMP_LP consists of a voltage reference generator and comparator set at different threshold levels for multi-level detection and the output is not latched.

Agile Analog designs are based on tried and tested architectures to ensure reliability and functionality. Our design methodology is programmatic, systematic and repeatable leading to analog IP that is more verifiable, more robust and more reliable. Our methodology also allows us to quickly re-target our IP to different process options. We support all the major foundries including TSMC, GlobalFoundries, Intel Foundry, Samsung Foundry, UMC and Other Foundries.

Key features

  • Active current: 2.20mA (typical)
  •  Powered-down current: 9.8nA (typical)
  • Detection time: 2ms (typical)
  • Hysteresis: 16.5mV (typical)
  • Threshold step size: 56.25mV
  • Threshold accuracy: 4.5mV (max)
  • Silicon area: 0.013 mm2 in 16nm technology
  • PSRR: @f < 1MHz: 38.5dB (typical)
  • @f ≥ 1MHz: 27.9dB (typical)

Block Diagram

agileCMP_LP block diagram

Benefits

  • Best-in-class deliverables for easy and seamless integration: our engineers have extensive experience taking complex SoCs from design to mass production
  • We believe that success is not just measured by delivery of netlist and layout, rather it extends to mass-production and beyond
  • Automated design procedure accelerates design time and enables quick re-centering with latest PDK updates so you can tape out with the latest foundry models
  • Tried and tested architecture ensures reliability and functionality

Applications

  • IoT, Security, Automotive, AI, SoCs, ASICs

What’s Included?

  • Datasheet
  • Testing and Integration Guide
  • Verilog Models
  • Floorplan (LEF)
  • Timing models (LIB)
  • Netlist (CDL)
  • Layout (GDS)
  • Physical Verification Report
  • Design Report

Files

Product Sheet Download

Note: some files may require an NDA depending on provider policy.

Specifications

Identity

Part Number
agileCMP_LP
Vendor
Agile Analog
Type
Silicon IP

Provider

Agile Analog
HQ: United Kingdom
Agile Analog is transforming the world of analog IP with Composa™, its innovative, configurable, multi-process analog IP technology. Headquartered in Cambridge, UK, with a growing number of partners and customers across the globe, Agile Analog has developed a unique way to automatically generate analog IP that meet the customer’s exact specifications on almost any process from any foundry. The company provides a wide and ever expanding selection of analog IP and subsystems for power management, data conversion, IC health and monitoring, security and always-on domains. Agile Analog's novel approach utilises tried and tested analog circuits within its Composa library to create customised and verified analog IP solutions. This reduces the time to market and increases quality, helping to accelerate innovation in semiconductor design.
Contact Agile Analog

Learn more about Comparator IP core

Achieving Groundbreaking Performance with a Digital PLL

This article compares analog, first-generation digital, and second-generation digital PLLs. It evaluates which type of PLL may be best in which situation. It further discloses a roadmap into other application areas, including general purpose / logic clocking, and regular low-jitter PLLs.

Improving Battery-Powered Device Operation Time Thanks To Power Efficient Sleep Mode

Allowing battery-powered devices to run, without battery recharge, for years rather than months, partakes in enhancing significantly end-user satisfaction and is a key point to enabling the emergence of IoT applications. Numerous applications, such as M2M, BLE, Zigbee…, have an activity rate (duty cycle) such that the power consumption in sleep mode dominates the overall current drawn by the SoC (System on Chip). For such applications, the design of the “Always-On power domain" (a.k.a AON power domain) is pivotal.

Generating High Speed CSI2 Video by an FPGA

In this article, we show how fast video streams conforming to MIPI CSI2 rev2.0 over MIPI DPHY rev1.2 can be generated, using VLSI Plus’ SVTPlus-CSI2-F IP core, with simple off-FPGA analog front-end. The high bit rates can be achieved with a relatively slow FPGA clock frequency, trading off FPGA resources for simple timing closure.

Design & Verify Virtual Platform with reusable TLM 2.0

As the system, software & IP complexity is increasing so is the demand of SystemC models & Virtual Platform for verification. To achieve it, the key requirements are that the models/platform should be developed fast, reusable & highly accurate. We are sharing the experience of our company 3D-IP Semiconductors Ltd. for the development of a generic Virtual Platform using TLM 2.0; reusable for any system model.

Metric Driven Verification of Reconfigurable Memory Controller IPs Using UVM Methodology for Improved Verification Effectiveness and Reusability

The paper presents a method for verifying a standard SDRAM controller IP, based on UVM framework using the Object Oriented verification language System Verilog. The verification technique focuses on a Metric Driven approach for reconfiguring the predictor model to suit the various functional realizations of the memory controller and also to improve the performance by effectively reducing the verification cycles for maximum functional coverage.

Frequently asked questions about Comparator IP cores

What is Low Power Comparator?

Low Power Comparator is a Comparator IP core from Agile Analog listed on Semi IP Hub.

How should engineers evaluate this Comparator?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Comparator IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

×
Semiconductor IP