NVDIMM-P Synthesizable Transactor
NVDIMM-P Synthesizable Transactor provides a smart way to verify the NVDIMM-P component of a SOC or a ASIC in Emulator or FPGA pl…
Overview
NVDIMM-P Synthesizable Transactor provides a smart way to verify the NVDIMM-P component of a SOC or a ASIC in Emulator or FPGA platform. The SmartDV's NVDIMM-P Synthesizable Transactor is fully compliant with standard NVDIMM-P Specification and provides the following features.
Key features
- Supports 100% of NVDIMM-P protocol standard NVDIMM-P specifications
- Supports all the NVDIMM-P commands as per the specs
- Supports all mode registers programming
- Supports programmable burst lengths
- Supports extend command sets
- Supports non-deterministic read/write latency support
- Supports RAS support
- Checks for following:
- Check-points include power on, initialization and power off rules
- State based rules, active command rules
- Read/Write command rules etc
- All timing violations
- Support all types of timing and protocol violation detection
- Models, detects and notifies the test bench of significant events such as transactions, warnings, timing and protocol violations
Block Diagram
Benefits
- Compatible with testbench writing using SmartDV's VIP
- All UVM sequences/testcases written with VIP can be reused
- Runs in every major emulators environment
- Runs in custom FPGA platforms
What’s Included?
- Synthesizable transactors
- Complete regression suite containing all the NVDIMM-P testcases
- Examples showing how to connect various components, and usage of Synthesizable Transactor
- Detailed documentation of all DPI, class, task and function's used in verification env
- Documentation contains User's Guide and Release notes
Files
Note: some files may require an NDA depending on provider policy.
Specifications
Identity
Provider
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Frequently asked questions about DDR Controller IP cores
What is NVDIMM-P Synthesizable Transactor?
NVDIMM-P Synthesizable Transactor is a DDR IP core from SmartDV Technologies listed on Semi IP Hub.
How should engineers evaluate this DDR?
Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this DDR IP.
Can this semiconductor IP be compared with similar products?
Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.