Vendor: Certus Semiconductor Category: Single-Protocol PHY

LVDS RX & TX IOs in multiple foundry technology

Certus provides full LVDS RX & TX IOs in GlobalFoundries and other foundry technologies.

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TSMC 65nm GP Silicon Proven View all specifications

Overview

Certus provides full LVDS RX & TX IOs in GlobalFoundries and other foundry technologies. The Certus LVDS solutions are ANSI/TIA/EIA-644-A compliant and are capable of data rates of up to 1.5Mbps. Unique to the Certus LVDS solution is that it is self-biased with no external reference blocks required. Our LVDS cell configurations also allow for flexible supply pad arrangements and dense IO placement without compromising signal integrity.

Built into our IO libraries, and also offered as a separate service, is our strong ESD expertise. Certus was founded by ESD engineers and our results speak for themselves. Not only do we address standard ESD such as HBM and CDM, but we can also provide on-chip solutions for standards such as IEC-61000-4-2, system-level ESD and Cable Discharge Events (CDE).

Certus also offers RGMII, SD, I2C, SMBUS, DDC, Analog/RF, HV and other IO variants across most major foundries and technology nodes. We are particularly suited at providing customized options in a cost-efficient framework. Please contact us for supplementary physical or electrical features to suit your needs.

Key features

  • LVDS TX
    • Output enable
    • Internally generated common mode reference (no external pin required)
    • Power-on sequence independence
    • ESD protection of 2KV HBM, 500V CDM
  • LVDS RX
    • Input enable
    • Built-in 100? RX termination resistor
    • Fault-safe mode for shorted or open RX pins
    • Power-on sequence independence
    • ESD protection of 2KV HBM, 500V CDM

Block Diagram

Certus LVDS Solutions block diagram

Benefits

  • Self-biased - no external reference required
  • Fail-safe
  • Flexible pad arrangements
  • Power sequence independence
  • Proven HBM & CDM ESD protection

Applications

  • LVDS

What’s Included?

  • GDS
  • CDL netlist
  • Verilog stub
  • Verilog behavioral model
  • LEF
  • Liberty Timing Files
  • IBIS (option)
  • Electrical datasheet
  • User guide and application notes
  • Consulting and Support

Silicon Options

Foundry Node Process Maturity
TSMC 65nm GP Silicon Proven

Specifications

Identity

Part Number
Certus LVDS Solutions
Vendor
Certus Semiconductor
Type
Silicon IP

Provider

Certus Semiconductor
HQ: United States
Certus Semiconductor has assembled several of the world’s foremost experts in IO and ESD design to offer our clients the ability to affordably tailor their IO libraries into the optimal fit for their products. Certus is offering the semiconductor industry a unique approach to custom IO libraries, including tailored IO designs, and ESD solutions based on simulations leveraging specialized silicon ESD models. In addition to offering fast turnaround custom IO designs, Certus offers independent ESD design, review and debug services. Through partnerships, Certus is also able to provide ESD testing & TLP support.
Contact Certus Semiconductor

Learn more about Single-Protocol PHY IP core

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Frequently asked questions about Single-Protocol PHY IP

What is LVDS RX & TX IOs in multiple foundry technology?

LVDS RX & TX IOs in multiple foundry technology is a Single-Protocol PHY IP core from Certus Semiconductor listed on Semi IP Hub. It is listed with support for tsmc Silicon Proven.

How should engineers evaluate this Single-Protocol PHY?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Single-Protocol PHY IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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