How Secure DDR Interfaces Protect DRAM from Memory Attacks
Brett Murdock, Dana Neustadter (Synopsys)
Vendor:
SmartDV Technologies
Category:
DDR
LPSDR Synthesizable Transactor
LPSDR Synthesizable Transactor provides a smart way to verify the LPSDR component of a SOC or a ASIC in Emulator or FPGA platform.
Overview
LPSDR Synthesizable Transactor provides a smart way to verify the LPSDR component of a SOC or a ASIC in Emulator or FPGA platform. The SmartDV's LPSDR Synthesizable Transactor is fully compliant with standard LPSDR Specification and provides the following features.
Key features
- Supports 100% of LPSDR protocol standard LPSDR specification
- Supports all the LPSDR commands as per the LPSDR specification
- Supports following device density:
- 512MB
- 1GB
- Supports following device modes:
- X16 mode
- X32 mode
- Supports programmable burst lengths: 1, 2, 4, 8, and continuous
- Supports following burst type:
- Sequential
- Interleaved
- Supports deep power down mode
- Supports auto-refresh and self-refresh mode
- Supports programmable partial array self refresh
- Supports burst termination operation
- Supports all data rates as per specification
- Checks for following:
- Check-points include power up, initialization and power off rules
- State based rules, active command rules
- Read/write command rules etc
- All timing violations
- Supports all mode registers programming
- Supports power down features
- Protocol checker fully compliant with LPSDR specification
Block Diagram
LPSDR Transactor block diagram
Benefits
- Compatible with testbench writing using SmartDV's VIP
- All UVM sequences/testcases written with VIP can be reused
- Runs in every major emulators environment
- Runs in custom FPGA platforms
What’s Included?
- Synthesizable transactors
- Complete regression suite containing all the LPSDR testcases
- Examples showing how to connect various components, and usage of Synthesizable Transactor
- Detailed documentation of all DPI, class, task and function's used in verification env
- Documentation contains User's Guide and Release notes
Files
Note: some files may require an NDA depending on provider policy.
Specifications
Identity
Part Number
LPSDR Transactor
Vendor
SmartDV Technologies
Type
Silicon IP
Provider
SmartDV Technologies
HQ:
India
At SmartDV Technologies™, we believe there’s a better way to approach semiconductor intellectual property (IP) for integrated circuits. We’ve been focused exclusively on IP since 2007—so whether you’re sourcing standards-based design IP for your next SoC, ASIC, or FPGA, or seeking verification solutions (VIP) to put your chip design through its paces, you’ll find SmartDV’s IP straightforward to integrate. By combining proprietary SmartCompiler™ technology with the knowledge of hundreds of expert engineers, SmartDV can customize IP to meet your unique design objectives: quickly, economically, and reliably. Don’t allow other suppliers to force onesize-fits-all cores into your chip design. Get the IP you need, tailored to your specifications, with SmartDV: IP Your Way.
Learn more about DDR IP core
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Frequently asked questions about DDR Controller IP cores
What is LPSDR Synthesizable Transactor?
LPSDR Synthesizable Transactor is a DDR IP core from SmartDV Technologies listed on Semi IP Hub.
How should engineers evaluate this DDR?
Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this DDR IP.
Can this semiconductor IP be compared with similar products?
Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.