MIPI D-PHY Tx-Only 4 Lanes in UMC (28nm, 22nm)
Synopsys’ IP D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and per…
- UMC
- 22nm
- ULP
- Available on request
MIPI PHY IP cores help engineering teams evaluate reusable semiconductor IP for advanced chip designs.
This page lets you compare MIPI PHY IP offerings from multiple vendors based on functionality, integration requirements, performance targets, power efficiency, and process compatibility.
MIPI D-PHY Tx-Only 4 Lanes in UMC (28nm, 22nm)
Synopsys’ IP D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and per…
MIPI D-PHY Rx-Only 4 Lanes in UMC (28nm, 22nm)
Synopsys’ IP D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and per…
MIPI D-PHY Rx-Only 2 Lanes in UMC (28nm)
Synopsys’ IP D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and per…
MIPI M-PHY v4.1 IP, Silicon Proven in UMC 28 HPC
The MIPI M-PHY Gear 4 IP is compatible with the most recent MIPI Feature Storage IP Solution SerDes PHY Product Brief Alliance M-…
MIPI M-PHY v3.1 IP, Silicon Proven in UMC 40LP
The most recent MIPI Feature Storage IP Solution SerDes PHY Product Brief Alliance M-PHY v3.0 Specification, UniPro v1.8 Specific…
MIPI D-PHY Rx IP, Silicon Proven in UMC 55LP
The MIPI D-PHY Analog RX IP Core completely complies with the D-PHY specification, version 1.2.
MIPI DPHY v1.2 TX 4 Lanes - UMC 28HPC 1.8V, North/South Poly Orientation
The D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral d…
MIPI DPHY v1.2 RX 4 Lanes - UMC 28HPC 1.8V, North/South Poly Orientation
The D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral d…
MIPI DPHY Tx 2 Lanes - UMC 28HPC 1.8V, North/South Poly Orientation
The D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral d…
MIPI DPHY Rx 2 Lanes - UMC 28HPC 1.8V, North/South Poly Orientation
The D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral d…
MIPI DPHY Tx 4 Lanes - UMC 22ULP 1.8V, North/South Poly Orientation
The D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral d…
MIPI DPHY Rx 4 Lanes - UMC 22ULP 1.8V, North/South Poly Orientation
The D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral d…
MIPI MPHY v3.1, 2Tx-2Rx Type-1, UMC 22ULL 1.8V, N/S orientation
MIPI M-PHY is a serial interface technology with high bandwidth capabilities, which is particularly developed for mobile applicat…
MIPI DPHY_RX v1.2, 2C4D, UMC 28HPC+, E/W orientation
The D-PHY is a popular MIPI physical layer developed for mobile applications because it is a flexible, high-speed, low-power and …
MIPI DPHY_TX v1.2, 1C4D, UMC 28HPC+, E/W orientation
The D-PHY is a popular MIPI physical layer developed for mobile applications because it is a flexible, high-speed, low-power and …
MIPI Transmitter CPHY 80Msps~2.5Gsps; DPHY 80Mbps~2.5Gbps ; UMC 28nm HPC process
MIPI Transmitter CPHY 80Msps~2.5Gsps; DPHY 80Mbps~2.5Gbps ; UMC 28nm HPC process
MIPI Receiver CPHY 80Msps~2.5Gsps; DPHY 80Mbps~2.5Gbps ; UMC 28nm HPC process_x005F_x000D_
MIPI Receiver CPHY 80Msps~2.5Gsps; DPHY 80Mbps~2.5Gbps ; UMC 28nm HPC process
MIPI Transmitter 80Mbps~2.5Gbps ; UMC 28nm HPC Logic Process
MIPI Transmitter 80Mbps~2.5Gbps ; UMC 28nm HPC Logic Process
MIPI Transmitter 80Mbps~2.5Gbps ; UMC 28nm HPC+ process
MIPI Transmitter 80Mbps~2.5Gbps ; UMC 28nm HPC+ process
MIPI Transmitter 80Mbps~2.5Gbps ; UMC 28nm HPC process
MIPI Transmitter 80Mbps~2.5Gbps ; UMC 28nm HPC process