Ultra High-Speed Cache Memory Compiler - 2-Port Register File - TSMC N3P
The Ultra High-Speed cache memory is an adaptable, independent, non-coherent cache Intellectual Property (IP) featuring an cache …
- TSMC
- 3nm
- N3P
- Silicon Proven
Register File IP cores provide reusable on-chip storage structures for processors, controllers, and accelerators in modern SoC and ASIC designs.
These IP cores support small, high-speed storage structures used in processors, DSPs, and accelerators, helping designers balance density, speed, power, and reliability in memory-centric subsystems
This catalog allows you to compare Register File IP cores from leading vendors based on density, performance, power efficiency, and process node compatibility.
Whether you are designing CPU cores, DSP engines, AI accelerators, or custom datapaths, you can find the right Register File IP for your application.
Ultra High-Speed Cache Memory Compiler - 2-Port Register File - TSMC N3P
The Ultra High-Speed cache memory is an adaptable, independent, non-coherent cache Intellectual Property (IP) featuring an cache …
TSMC CLN16FFC Ultra High Density One Port Register File
IGMSLRV01A is a synchronous SVT / LVT periphery ultra high density one port register file compiler.
TSMC CLN7FF Synchronous One Port Register File Compiler
The IGMSLRX01A is a synchronous, ultra-high density one port register file compiler.
TSMC CLN6FF Asynchronous Read Two Port Register File Compiler
IGMDLRX01A is an asynchronous read and synchronous write ULVT periphery two port register file compiler (2PRF).