Vendor:
T2M GmbH
Category:
SPI / QSPI XSPI
Express Serial Peripheral Interface IP Core
eSPI controller is full-featured, easy-to-use, synthesizable design, compatible with standard protocol of standard eSPI specifica…
Overview
eSPI controller is full-featured, easy-to-use, synthesizable design, compatible with standard protocol of standard eSPI specification. Through its eSPI compatibility, it provides a simple interface to a wide range of low-cost devices. ESPI controller IP is proven in FPGA environment. The host interface of the eSPI controller can be simple interface or can be AMBA APB, AMBA AHB, AMBA AXI, VCI, OCP, Avalon, PLB, Tilelink, Wishbone or Custom protocol. eSPI Controller IP is supported natively in Verilog and VHDL.
Key features
- Compliant with eSPI base specification as defined in Enhanced Serial Peripheral Interface (eSPI) Specification rev.1.0.
- Supports Master and Slave Modes
- Supports Single, Dual and Quad modes
- Supports TX and RX operation as per specs
- Supports below transaction phases • Command Phase • Turn-Around Phase • Response Phase
- Supports baud rate selection
- Supports Slave triggered transaction
- Supports Power management Event
- Supports Interrupts and Alert
- Supports In-band reset
- Supports below multiple channels • Peripheral Channel • Virtual Wires Channel • OOB Message (Tunnelled SMBus) Channel • Run-time Flash Access Channel
- Various kind of Master and Slave errors detection and handling
- Supports CRC checking
- Fully synthesizable.
- Static synchronous design.
- Positive edge clocking and no internal tri-states
- Scan test ready
- Simple interface allows easy connection to Microprocessor/Microcontroller devices
What’s Included?
- The eSPI CONTROLLER interface is available in Source and netlist products.
- The Source product is delivered in Verilog. If needed, VHDL and SystemC can also be provided
- Easy to use Verilog Test Environment with Verilog Testcases
- Lint, CDC, Synthesis, Simulation Scripts with waiver files
- IP-XACT RDL generated address map
- Firmware code and Linux driver package
- Documentation contains User's Guide and Release notes.
Specifications
Identity
Part Number
eSPI Master / Slave Controller IP
Vendor
T2M GmbH
Type
Silicon IP
Files
Note: some files may require an NDA depending on provider policy.
Provider
T2M GmbH
T2M GmbH is the leading Global Technology Company supplying state of the art complex semiconductor connectivity IPs and KGDs, enabling the creation of complex connected devices for Mobile, IoT and Wearable markets.
T2M's unique SoC White Box IPs are the design database of mass production RF connectivity chips supporting standards including Wifi, BT, BLE, Zigbee, NFC, LTE, GSM, GNS. They are available in source code as well as KGD for SIP / modules.
With offices in USA, Europe, China, Taiwan, South Korea, Japan, Singapore and India, T2M’s highly experienced team provides local support, accelerating product development and Time 2 Market.
Learn more about SPI / QSPI XSPI IP core
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Frequently asked questions about SPI / QSPI / xSPI IP cores
What is Express Serial Peripheral Interface IP Core?
Express Serial Peripheral Interface IP Core is a SPI / QSPI XSPI IP core from T2M GmbH listed on Semi IP Hub.
How should engineers evaluate this SPI / QSPI XSPI?
Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this SPI / QSPI XSPI IP.
Can this semiconductor IP be compared with similar products?
Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.