Overview
The eDisplay Port v1.4 Rx PHY IP Core caters to chips requiring high-bandwidth communication with minimal power consumption. It serves as a multi-gigabit receiver macro compliant with eDP standards. This adaptable and dependable solution enables data reception speeds reaching 5.4Gbps, optimizing both power usage and die size. It boasts simplicity in production and integration into Video Interface systems. The AUX channel supports a bit rate close to 1Mbps, functioning as a half-duplex, bidirectional channel composed of a single differential pair. Each macro includes an AUX channel with one PLL and bias gen unit, along with multiple receiver channels. Essential functions of the receiver encompass a dedicated equalizer, clock and data recovery (CDR), S2P, and self-test features, with the ability to disable individual channels as needed.
Provider
T2M GmbH is the leading Global Technology Company supplying state of the art complex semiconductor connectivity IPs and KGDs, enabling the creation of complex connected devices for Mobile, IoT and Wearable markets.
T2M's unique SoC White Box IPs are the design database of mass production RF connectivity chips supporting standards including Wifi, BT, BLE, Zigbee, NFC, LTE, GSM, GNS. They are available in source code as well as KGD for SIP / modules.
With offices in USA, Europe, China, Taiwan, South Korea, Japan, Singapore and India, T2M’s highly experienced team provides local support, accelerating product development and Time 2 Market.
Learn more about Single-Protocol PHY IP core
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