ETR101290 IP core (Checks MPEG TS stream conformity to ETSI TR 101 290 V1.4.1 (2020-06))

Overview

The ETR101290 IP core allows to check MPEG TS stream conformity to ETSI TR 101 290 V1.4.1 (2020-06)

• ETR101290 is CPU programmable
• It includes all the processing stages to analyze PSI/SI tables and ETR101290 errors
• Each subpart of any priority item can be analyzed or not
• An output event signal can inform a CPU of a new incoming error
• Configurable output UART can log selected detected errors

Key Features

Drop-in module for Spartan®-6, Virtex®-6, 7 Series and later FPGA families
DVB compliant
Auto adaptive and real time PSI/SI analysis
Manage up to 124 services and all PID values
For priority 1 (all), 2 (excepted PCR) and 3 (3.1/3.2; 3.4 to 3.6)
Configurable analysis authorization
Configurable UART output log
Full synthesizable RTL VHDL design (not delivered) for easy customization
Design delivered as Netlist

Block Diagram

Applications

The MVD DVB ETR101290 core can be used to check the conformity of a DVB MPEG TS stream to the ETR101290 standard

Deliverables

VHDL source code : can be delivered as an option under NDA and other specific clauses

Technical Specifications

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