Capless LDO regulator on SMIC 65nm
The present IP is a low-dropout (LDO) and capacitor-less voltage regulator developed using SMIC's 65nm ETOX Nor Flash process.
Overview
The present IP is a low-dropout (LDO) and capacitor-less voltage regulator developed using SMIC's 65nm ETOX Nor Flash process. It generates adjustable voltages from 0.5V to 4.0V in 0.1V step with a ripple voltage of less than 80mV.
Key features
- Support output voltage trimming
- Supply voltage: 1.65v~4v
- Output voltage: 0.5~4v
- Loading current capability: up to 200uA
- Process Node: SMIC65ETOX_3350_2P3M Process
- Operation Temperature: Tj = -40°C ~ +125°C
Silicon Options
| Foundry | Node | Process | Maturity |
|---|---|---|---|
| SMIC | 65nm | LL | Silicon Proven |
Specifications
Identity
Provider
Learn more about LDO Voltage Regulator IP core
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Frequently asked questions about LDO Voltage Regulator IP cores
What is Capless LDO regulator on SMIC 65nm?
Capless LDO regulator on SMIC 65nm is a LDO Voltage Regulator IP core from UniIC listed on Semi IP Hub. It is listed with support for smic Silicon Proven.
How should engineers evaluate this LDO Voltage Regulator?
Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this LDO Voltage Regulator IP.
Can this semiconductor IP be compared with similar products?
Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.