Vendor: NTLab Category: PLL

25MHz to 4.0GHz Fractional-N RC PLL Synthesizer on TSMC 3nm N3P

Fractional-N Phase locked loop frequency synthesizer is intended for ASIC clock generation.

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TSMC 3nm N3P Pre-Silicon View all specifications

Overview

Fractional-N Phase locked loop frequency synthesizer is intended for ASIC clock generation. The Fractional-N PLL loop with 2GHz-4GHz VCO has high phase noise performance and ultra-fine frequency tuning step.

VCO Sub-band auto select (SAS) system allows to find automatically appropriate sub-band for VCO on locked PLL.

The block embeds reference current sources.

Silicon area: 0.01254mm2 (108um x 115um)

ELECTRICAL CHARACTERISTICS

 

Parameter

 

Symbol

 

Conditions

Value

 

Units

min

typ

max

Supply voltage

PLL_VDD

-

0.675

0.75

0.825

V

Operating temperature range

Tj

Junction

-40

27

125

ºС

Output frequency

Fout

-

25

-

4000

MHz

 

Phase noise

LOPN

at 10MHz

-

-107

-

dBc/Hz

at 1GHz

-

-147

-

dBc/Hz

Output clock period jitter

Jperiod

-

-

0.6

-

ps

Reference frequency

Fref

-

4.0

-

1600

MHz

Lock time

Tlock

-

-

50

-

us

Start-up time

Tstart

-

-

3.1

-

ms

Output frequency fine tuning range

A

From center frequency

-1000

-

1000

ppm

LO duty cycle

LODC

-

45

-

55

%

Current consumption

Icc

-

-

3.0

5.0

mA

Shutdown current

Istd

-

-

15

900

uA

Reference signal - high level

VRefH

CMOS

PLL_VDD-0.1

-

PLL_VDD

 

V

Reference signal - low level

VRefL

0

-

0.1

 

Block Diagram

003TSMC_PLL_01 block diagram

Files

Product Sheet Download

Note: some files may require an NDA depending on provider policy.

Silicon Options

Foundry Node Process Maturity
TSMC 3nm N3P Pre-Silicon

Specifications

Identity

Part Number
003TSMC_PLL_01
Vendor
NTLab

Provider

NTLab
HQ: Lithuania
NTLab is a vertically integrated microelectronics design center. It has 70+ experienced and qualified engineers. NTLab specializes in the designing of mixed-signal and RF ICs and Systems-on-Chip. It has a wide range of own silicon-verified IP blocks: processor cores, interfaces, analog and high-frequency PHYs, etc., thus allowing customized design to be fast and predictable. In-company unique combination of competences in digital, analog and RF circuits and embedded software enables NTLab to participate in the projects that require deep research and utilize most sophisticated and advanced techniques: multi-system GPS/GLONASS/Galileo/BeiDou/NavIC(IRNSS)/QZSS/SBAS navigation, RF ID, wireless communications, etc. All designed ICs are provided with test and development tools, as well as with reference software. NTLab offers a wide range of silicon proven analog/mixed-signal IPs in 0.35µm, 0.25 µm, 0.18 µm, 0.13 µm, 0.09 µm, 65nm, 55nm, 40nm, 28nm, 22 nm CMOS and SiGe BiCMOS processes. These IPs are suitable for devices targeted both consumer and industrial markets. Most of these IPs have been proven in silicon on the foundries: Samsung, UMC, GlobalFoundries, SMIC, VIS, Tower, X-FAB, iHP, AMS, SilTerra, STMicroelectronics, Winfoundry.
Contact NTLab

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Frequently asked questions about PLL IP cores

What is 25MHz to 4.0GHz Fractional-N RC PLL Synthesizer on TSMC 3nm N3P?

25MHz to 4.0GHz Fractional-N RC PLL Synthesizer on TSMC 3nm N3P is a PLL IP core from NTLab listed on Semi IP Hub. It is listed with support for tsmc Pre-Silicon.

How should engineers evaluate this PLL?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this PLL IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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