Overview
For auxiliary devices, a Universal Serial Bus (USB) transceiver is offered. The PHY complies with the requirements of UTMI, USB 2.0 PIPE, and USB 3.0 (USB SuperSpeed). The USB3.0 PHY IP transceiver is designed to consume little power and take up little space on the chip without compromising speed or data throughput. The USB3.0 PHY IP includes a full on-chip physical transceiver solution with Electrostatic Discharge (ESD) protection, a built-in self-test module with inbuilt jitter injection, and a dynamic equalization circuit to provide comprehensive support for high-performance designs. Several IP sources are supported by the USB3 MAC layer through the shared PHY interface (PIPE). Internal test monitoring and jitter are reduced by using constant power, built-in Jitter Injection Output, built-in Self-Test, and approved change of analogue circuit characteristics.
Provider
T2M GmbH is the leading Global Technology Company supplying state of the art complex semiconductor connectivity IPs and KGDs, enabling the creation of complex connected devices for Mobile, IoT and Wearable markets.
T2M's unique SoC White Box IPs are the design database of mass production RF connectivity chips supporting standards including Wifi, BT, BLE, Zigbee, NFC, LTE, GSM, GNS. They are available in source code as well as KGD for SIP / modules.
With offices in USA, Europe, China, Taiwan, South Korea, Japan, Singapore and India, T2M’s highly experienced team provides local support, accelerating product development and Time 2 Market.
Learn more about Single-Protocol PHY IP core
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