Vendor: ASICS World Services, LTD. Category: SATA Controller

Serial ATA I/II/III Host Controller IP Core Compliance Certified by UNH Labs

The Serial ATA Host Controller IP Core provides an interface to highspeed serial link replacements for the parallel ATA attachmen…

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Overview

The Serial ATA Host Controller IP Core provides an interface to highspeed serial link replacements for the parallel ATA attachment of mass storage devices. The serial link employed is a highspeed differential layer that utilizes Gigabit technology and 8b/10b encoding.

This core is fully compliant to the Serial ATA 3.0  specification.

ARCHITECTURE

The Serial ATA Link and Transport Layer Core implements a serial ATA host interface which connects to a SATA PHY via a 10/20/40 bit interface and provides a Wishbone slave interface for register and DMA access.

It consists of the link layer module with 10/20/40 bit data paths to the physical layer and a transport layer module which connects to the system via a Wishbone slave interface.

SAPIS PHY INTERFACE

This interface connects to any SAPIS compliant serial ATA PHY. Power management and speed negotiation signals are included. The PHY interface is synchronous to the PHY clock domain, which may have a different clock frequency than the system clock domain. Synchronization is done by the Serial ATA Link and Transport Layer Core.

DMA HANDSHAKE

Simple handshake signals are provided to connect a DMA unit to the core module. The DMA requests will be asserted as soon as any transmit data is available or is needed in the core's data FIFO. The DMA unit will then access the data FIFO via the Wishbone slave interface. A system interrupt will inform host software on completion of a data transfer.

Automatic flow control mechanisms control data throttling to avoid underflow or overflow of the transmit data FIFO. The DMA unit (or host software) may work at any speed without the risk of data loss. Data FIFO thresholds can be adjusted to optimize the data flow control.

Key features

  • High Throughput: 531 MBytes/sec Read, 505 MBytes/sec Write
  • Low Latency: 66K IOPS Read, 67K IOPS Write (4k blocks)
  • Asynchronous, unrestricted SoC clock, independent of PHY clock
  • Includes Xilinx Transceiver based PHY
  • Fully compliant to SATA V3.0
    • NCQ
    • FIS based switching
  • Supports 1.5 Gbps, 3.0 Gbps and 6.0 Gbps
  • AXI Light interface for register access
  • AXI Stream Interface and for data transfers
  • Full support for PIO, DMA and FPDMA transfers
  • Implements the shadow register block and the serial ATA status and control registers
  • Parallel ATA legacy software compatibility
  • 48bit address feature set supported
  • Power management support (partial and slumber)
  • DMA Support
    • Descriptor Based Command Processing
    • Unlimited command list size
  • Many configuration options
  • ucLinux Drivers

Block Diagram

SATA 3_HOST_AXI block diagram

Benefits

  • High Performance
  • AXI Interface
  • Flexible
  • Compact
  • Cost-effective
  • Many Shipping Products

Applications

  • Embedded Application
  • ucLinux
  • Data Recorder

What’s Included?

  • Verilog Source Code
  • Test Bench
  • Sample Synthesis scripts
  • Documentation
  • Reference Resign
  • ucLinux Drivers

Files

Product Sheet Download

Note: some files may require an NDA depending on provider policy.

Specifications

Identity

Part Number
SATA 3_HOST_AXI
Vendor
ASICS World Services, LTD.

Provider

ASICS World Services, LTD.
ASICs World Services specialize in providing top-notch IP Cores and design services. We will assist you in any phase of the design cycle, or take your idea from the conceptual stage to final product. With over 60 years of experience in the field, we have a long list of successfully completed projects.
Contact ASICS World Services, LTD.

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Frequently asked questions about SATA Controller IP

What is Serial ATA I/II/III Host Controller IP Core Compliance Certified by UNH Labs?

Serial ATA I/II/III Host Controller IP Core Compliance Certified by UNH Labs is a SATA Controller IP core from ASICS World Services, LTD. listed on Semi IP Hub.

How should engineers evaluate this SATA Controller?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this SATA Controller IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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