Scalable and flexible display processor
The DC8000 Display Processing family is designed specifically for Wearable, MCU, MPU, and Mobile applications that need hardware …
Overview
The DC8000 Display Processing family is designed specifically for Wearable, MCU, MPU, and Mobile applications that need hardware UI displays and effects. It is absolutely essential for building efficient mobile and embedded systems targeting the next generation of displays to meet rising consumer expectations for appealing UI. Vivante DC8000 Display Processing IP provides a range of low-power and high-performance display cores that can be used for reading rendered images from the frame buffer. In addition to providing hardware cursor patterns, the display processing performs format conversions, dithering, and gamma corrections.
Addressable screen sizes range from the smallest wearable devices, IoT devices, cell phones to 4K resolutions. Vivante DC8000 Display Processing IP is designed for easy integration onto the SoC, providing powerful UI, graphics, video at the lower power consumption and the smaller of silicon footprints.
Key features
- Leading Performance per Area
- "Push button" reference flow for Cadence and Synopsys
- 100 ps clock uncertainty
- Test insertion ready
- Extreme Low Power Design
- Intelligent power management and control
- Automatic hardware dynamic power control
- Software controlled power states
- Automatic clock/power gating of flip flops, RAMs, and functional blocks
- Display Output
- Parallel pixel output with 24-bit or 30-bit data
- DPI 24-bit, 18-bit (2 configs) and 16-bit support (3 configs)
- Adaptable to external serialization logic, e.g. HDMI
- AXI bus Interfaces
- 64-bit or 128-bit AXI
- Optional ACE-Lite
- Bursts to 128 bytes (64-bit AXI) /256 bytes (128-bit AXI)
- Display Control
- Dual Display available with: Independent clock bits and gating controls; Dither LUT for each display; Independent sync and gamma signals; Cursor can be shared across displays
- Scaling and Rotation of input surfaces available
- Input formats supported: ARGB8888, ARGB1555, RGB565, ARGB4444, YUV422-YUY2 YUV422-UYVY, YUV422-NV16, YUV420-NV12, YUV420-10bit semi-planar
- Unified Compression Support
Benefits
- Target Display Resolution: 4KX2K
- MIPI-DPI Interfaces Support
- HDMI/DP/eDP Interfaces Support
- Default Layers:2
- CSC, Gamma correction, Dither, Cursor
- Rotation/Scaling
- Unified Compression Support
- 10-bit Format Support
What’s Included?
- Synthesizable Verilog RTL
- Memory specifications
- Memory specifications
- SoC integration test suites
- System diagnostic tests (FPGA and SoCsystems)
- FPGA bit file (Xilinx) for prototyping
- Timing constraints
- Reference floor plan definition
- Reference implementation flow
- Reference formal verification script
Files
Note: some files may require an NDA depending on provider policy.
Specifications
Identity
Provider
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Frequently asked questions about Display Controller IP
What is Scalable and flexible display processor?
Scalable and flexible display processor is a Display Controller IP core from VeriSilicon Microelectronics (Shanghai) Co., Ltd. listed on Semi IP Hub.
How should engineers evaluate this Display Controller?
Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Display Controller IP.
Can this semiconductor IP be compared with similar products?
Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.