Vendor: Rambus, Inc. Category: Root Of Trust

Root of Trust - Foundational security in SoCs and FPGAs for IoT clients and sensors

Designed to be integrated in power and space-constrained SoCs or FPGAs, the RT-120 Root of Trust (formerly VaultIP) is a FIPS 140…

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Overview

Designed to be integrated in power and space-constrained SoCs or FPGAs, the RT-120 Root of Trust (formerly VaultIP) is a FIPS 140-3 compliant hardware core that guards the most sensitive assets on chips and establishes the foundation for platform security.

Featuring a firmware-controlled architecture with dedicated secure memories, the RT-120 hardware Root of Trust provides a variety of cryptographic accelerators including AES, SHA-2, RSA and ECC. Ideal for power and space-sensitive applications like IoT clients, edge nodes, and sensors. The RT-120 Root of Trust offers the best balance of size and performance available on the market.

The RT-120 offers a series of key security use cases ‘out of the box’, including:

  • Secure Boot assist to host CPU(s) and protection of key material
  • Secure firmware upgrade management for Host CPU
  • Lifecycle management support
  • Secure Debug support
  • Secure device authentication and identity protection

The RT-120 provides a secure asset store:

  • Only the RT-120 can manage, use and access the assets
  • The O/S and applications cannot access key values
  • Applications request asset use by reference through authorization
  • Enforces policies for access and use of keys and cryptographic functions
  • Key generation, derivation, storage and transport

How the Root of Trust Works

The RT-120 Root of Trust is a silicon IP core developed to protect an SoC platform and its operation. It allows the SoC to boot securely and protects sensitive key material and assets. At its heart, its Secure Asset Store allows import, negotiation, and creation of secret and private key material. Safe use of key material is enforced through a flexible key use and access policy. Keys can be securely stored in off-chip NVM. Fully featured, its cryptographic data plane associated to its DMA offloads the main CPU while never exposing secret data to the OS or the applications. It is designed to provide secure, energy efficient and accelerated security functions.

Readily deployable, the RT-120 Root of Trust is offered in off-the-shelf configurations, allowing a choice tailored to the needs of your application. Configurations differ by cryptographic accelerators contained and 3rd-party certification and standard compliance.

The RT-120 is part of the broad Rambus Root of Trust portfolio, which ranges from small, lightweight cores designed to protect IoT endpoints all the way to fully programmable Root of Trust cores designed to protect the most sensitive government/defense chips and automotive deployments requiring ISO-26262 certifications.

Rambus can optionally offer dedicated FIPS 140-3 support packages to its licensees that provide FIPS 140-3 related certification documentation, FIPS test scripts, and dedicated FIPS support.

 

Feature Description Details
FIPS 140-3  CAVP and CMVP Compliant Includes CAVP certificates for NIST approved algorithms and TRNG
Cipher Algorithm Support AES (all key sizes) Modes: CBC, CTR, CCM, CMAC
Hash Algorithms SHA-1, SHA-2 SHA-2 224-256
Message Authentication Code Algorithms HMAC-SHA-1, HMAC-SHA-2 SHA-2 224-256
AEAD Algorithms AES-CCM Modes: CCM
Signature Generation and Verification ECDSA
RSA up to 3096 bits		 NIST P-224, P-256, P-384,
P-521
Key Agreement Algorithms ECDH
DH		 NIST P-224, P-256, P-384, P-521
Up to 3096 bits
Key Transport Algorithms ECIES
RSA Wrap/Unwrap (RSA-OAEP)
AES-WRAP		 128- and 256-bit strength
Up to 3096 bits
128- and 256-bit strength
True Random Number Generator NIST SP800-90A/B/C NIST ENT certificate
Crypto Performance Cipher/Hash Performance (Gbps) @500MHz Scalable, ~2 Gbps
I/O Bus AMBA Bus Master/Slave AXI/AHB Master, AXI/AHB/APB Slave
OTP Interface Interface to 3rd-Party OTP

TCM

 

Block Diagram

RT-120 block diagram

Benefits

  • Side channel attack resistant
  • Technology and node independent
  • Superior cryptographic protection
  • Use with any ASIC or FPGA

Applications

  • IoT, IIoT, sensors, gateways

What’s Included?

  • Complete Documentation
  • Tools and Scripts: Verilog for synthesis and simulation
  • Complete verification test bench and comprehensive set of test vectors
  • Container-authoring software
  • Boot loader and firmware, including secure RTOS and security monitor
  • HLOS APIs for accessing capabilities
  • Complete development environment, including compiler, assembler, debugger, simulator, reference code
  • QEMU implementation (source code)
  • Implementation of HLOS or ASIC components (source code)
  • Sample application demonstrating usage of Secure Application
  • HLOS Programmer’s Guide
  • Developer’s Guide
  • API Guide
  • Integration Guide

Files

Product Sheet Download

Note: some files may require an NDA depending on provider policy.

Specifications

Identity

Part Number
RT-120
Vendor
Rambus, Inc.

Provider

Rambus, Inc.
HQ: USA
Rambus delivers industry-leading chips and silicon IP for the data center and AI infrastructure. With over three decades of advanced semiconductor experience, our products and technologies address the critical bottlenecks between memory and processing to accelerate data-intensive workloads. By enabling greater bandwidth, efficiency and security across next-generation computing platforms, we make data faster and safer.
Contact Rambus, Inc.

Learn more about Root Of Trust IP core

Why Anti-tamper Sensors Matter: Agile Analog and Rambus Deliver Comprehensive Security Solution

If your device processes valuable data, controls a critical function, or connects to a wider network, it’s a target. Attackers don’t just try to break software; they increasingly physically tamper with hardware; probing, fault injecting, or opening enclosures to bypass protections and extract secrets. The consequences range from IP theft and fraud to orchestrated downtime across fleets of connected devices.

Side-Channel Attacks On Post-Quantum Cryptography

Device security requires designers to secure their algorithms, not only against direct attacks on the input and output, but also against side-channel attacks. This requirement is especially notable for cryptographic algorithms, since they have a regular, well-understood structure, and the secrets they process often give access to much more information.

Cryptography Does Not Equal Security

At Rambus, we often receive RFIs, RFPs and RFQs for security silicon IP cores to be used in our customer’s next semiconductor product. Such requests often contain a long shopping list of required cryptographic algorithms, their modes of operation, their key lengths or strengths and performance and sizing requirements.

Root of Trust: A Security Essential for Cyber Defense

Imagine a datacenter powering critical cloud services, silently compromised by a tampered chip inserted during manufacturing. In most cases, the malware would be practically impossible to remove and could persist across formats/reinstalls !

Frequently asked questions about Root of Trust IP cores

What is Root of Trust - Foundational security in SoCs and FPGAs for IoT clients and sensors?

Root of Trust - Foundational security in SoCs and FPGAs for IoT clients and sensors is a Root Of Trust IP core from Rambus, Inc. listed on Semi IP Hub.

How should engineers evaluate this Root Of Trust?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Root Of Trust IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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