Vendor: SmartDV Technologies Category: Root Of Trust

Trusted Platform Module (TPM) Verification IP

TPM Verification IP enables trust in computing the platforms in general.

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Overview

TPM Verification IP enables trust in computing the platforms in general. TPM Verification IP provides an smart way to verify the data transmission between TPM master and slave. The SmartDV's TPM Verification IP is fully compliant with Trusted Computing Group (TCG) Trusted Platform Module(TPM) Version 1.1b/1.2 and 2.0 Specification and provides the following features.

Trusted Platform Module (TPM) Verification IP is supported natively in SystemVerilog, VMM, RVM, AVM, OVM, UVM, Verilog, SystemC, VERA, Specman E and non-standard verification env

Trusted Platform Module (TPM) Verification IP comes with optional Smart Visual Protocol Debugger (Smart ViPDebug), which is GUI based debugger to speed up debugging.

Key features

  • Full TPM master device and slave device functionality.
  • Compliant to the Trusted Computing Group (TCG) Trusted Platform Module(TPM) Version 1.1b/1.2 and 2.0 Specification
  • Compliant with TCG PC client-specific TPM Interface Specification (TIS) version 1.2/1.3
  • Hardware Asymmetric Crypto Engine.
  • Internal EEPROM Storage for RSA Keys.
  • Supports Low Pin Count (LPC), Serial Periferal Interface (SPI) and I2C interfaces.
  • - I2C Interface
    • 400kHz Fast Mode/100kHz Standard Mode I2C Operation
    • NV Storage Space for 2066 bytes of User Defined Data
  • - LPC Interface
    • 33MHz LPC bus for easy PC interface
    • NV storage space for 1756 bytes of user defined data
  • - SPI Interface
    • SPI Protocol Up to 45MHz* (*Typical PC Operating Range is 24MHz to 33MHz)
    • NV Storage Space for 2066 bytes of User Defined Data
  • Internal, high-quality Random Number Generator (RNG), HMAC, AES, SHA, and RSA Engines

Block Diagram

Trusted Platform Module (TPM) VIP block diagram

Benefits

  • Faster testbench development and more complete verification of TPM designs.
  • Simplifies results analysis.
  • Easy to use command interface simplifies testbench control and configuration of transmitter and receiver.
  • Runs in every major simulation environment.

What’s Included?

  • Complete regression suite containing all the TPM testcases.
  • Examples showing how to connect various components, and usage of Master, Slave and Monitor.
  • Detailed documentation of all class, task and function's used in verification env.
  • Documentation contains User's Guide and Release notes.

Files

Product Sheet Download

Note: some files may require an NDA depending on provider policy.

Specifications

Identity

Part Number
Trusted Platform Module (TPM) VIP
Vendor
SmartDV Technologies

Provider

SmartDV Technologies
HQ: India
At SmartDV Technologies™, we believe there’s a better way to approach semiconductor intellectual property (IP) for integrated circuits. We’ve been focused exclusively on IP since 2007—so whether you’re sourcing standards-based design IP for your next SoC, ASIC, or FPGA, or seeking verification solutions (VIP) to put your chip design through its paces, you’ll find SmartDV’s IP straightforward to integrate. By combining proprietary SmartCompiler™ technology with the knowledge of hundreds of expert engineers, SmartDV can customize IP to meet your unique design objectives: quickly, economically, and reliably. Don’t allow other suppliers to force onesize-fits-all cores into your chip design. Get the IP you need, tailored to your specifications, with SmartDV: IP Your Way.
Contact SmartDV Technologies

Learn more about Root Of Trust IP core

Root of Trust: A Security Essential for Cyber Defense

Imagine a datacenter powering critical cloud services, silently compromised by a tampered chip inserted during manufacturing. In most cases, the malware would be practically impossible to remove and could persist across formats/reinstalls !

Why Hardware Root of Trust Needs Anti-Tampering Design

The hardware root of trust (HRoT) provides the trust base (root key), hardware identifier (UID), hardware unique key (HUK), and entropy required for the secure operation of the entire chip and therefore is often the focus of hacker attacks. If the design can’t effectively resist attacks, hackers can easily obtain the secrets of the entire chip. Attackers can use the secrets to crack identity authentication and data encryption and steal product design know-how, causing application security problems.

Frequently asked questions about Root of Trust IP cores

What is Trusted Platform Module (TPM) Verification IP?

Trusted Platform Module (TPM) Verification IP is a Root Of Trust IP core from SmartDV Technologies listed on Semi IP Hub.

How should engineers evaluate this Root Of Trust?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Root Of Trust IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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