Rail to Rail Input and Output Operational Amplifier
The WEAOPSP18RI18RO1F22G is a rail to rail input and rail to rail output folded cascode with rail to rail output gm stage with in…
Overview
The WEAOPSP18RI18RO1F22G is a rail to rail input and rail to rail output folded cascode with rail to rail output gm stage with input offset control capability. The opamp is ideal for ADC input buffers with offset control requirements for the ADC calibration.
Key features
- Power Supply : 1.8 V
- Open loop gain : 133 dB
- PSRR : 65 dB@ 1 KHz
- 27 dB@ 1 MHz
- Noise @100 KHz : -157 dBV/sqrt (Hz)
- 13.5 nV/sqrt (Hz)
- Noise @1 MHz : -160 dBV/sqrt (Hz)
- 10 nV/sqrt (Hz)
- Offset : 544 uV
- Bandwidth : 2.8 Hz
- Output impedance : 91 KOhm
- Power Consumption : 1.1 mW
- Slew rate : 5 V/us
- Distortion SFDR @1 MHz
- (Vin 500m Vp-p) : 55 dB
- Area : 94 um x 188 um
- Process : 22FDX
- Metal Option : 19
Block Diagram
Files
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Silicon Options
| Foundry | Node | Process | Maturity |
|---|---|---|---|
| GlobalFoundries | 22nm | FDX | — |
Specifications
Identity
Provider
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Frequently asked questions about Amplifier IP cores
What is Rail to Rail Input and Output Operational Amplifier?
Rail to Rail Input and Output Operational Amplifier is a Amplifier IP core from Weasic Microelectronics listed on Semi IP Hub. It is listed with support for globalfoundries.
How should engineers evaluate this Amplifier?
Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Amplifier IP.
Can this semiconductor IP be compared with similar products?
Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.