NVMe expansion
The Flash MX IP Core implements a hardware accelerator for zstd compression and decompression.
Overview
The Flash MX IP Core implements a hardware accelerator for zstd compression and decompression. Compute-intensive software-based compression is offloaded from the host to the IP, delivering high compression performance at unmatched power efficiency.
Key features
- Turn key solution: compression, compaction, memory management
- Transparent addressing to operating system and applications
- Operates on page granularity to enable high compression performance
Benefits
- Standards
- Hardware accelerated zstd
- Compression algorithm: zstd
- Interface: AXI4, CHI
- Architecture
- Modular architecture, enables scalability to meet customer throughput requirements
- Architectural configuration parameters accessible to fine tune performance
What’s Included?
- Performance evaluation license
- C++ compression model for integration in customer performance simulation model
- FPGA evaluation license
- Encrypted IP delivery (Xilinx)
- HDL Source Licenses
- Synthesizable System Verilog RTL (encrypted)
- Implementation constraints
- UVM testbench (self-checking)
- Vectors for testbench and expected results
- User Documentation
Files
Note: some files may require an NDA depending on provider policy.
Specifications
Identity
Provider
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Frequently asked questions about Data Compression IP
What is NVMe expansion?
NVMe expansion is a Data Compression IP core from ZeroPoint Technologies AB listed on Semi IP Hub.
How should engineers evaluate this Data Compression?
Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Data Compression IP.
Can this semiconductor IP be compared with similar products?
Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.