LDPC for 5G DVBS2 802.11

Encoder:
- Every H-matrix (out of 102, 51 for BG1, and 51 for BG2 in 5G) has its encoder, which is just a bunch
of XOR gates and combinational circuitry.
- Has a Syndrome calculator to make sure the codeword has
zero Syndrome
Decoder:
- Does not use min-sum approximation
- Uses exact tan hyperbolic and log approximation. sum-Product approximation
- converges faster to the correct values
- every H-matrix (out of 102) will have its decoder with the
unique approximation coefficients
- Every iteration takes only five clock cycles, which may go to ten
if logic is pipelined.
- Can converge in significantly fewer iterations because of exact approximation.
- Has a Syndrome calculator to verify the output codeword converges to
zero Syndrome
- Received data has three states per bit
which are 1,0 or unknown
in BPSK, it is 3,1,0

Rate matching:
- Has the full capability of rate matching using shortening of the codeword
for data and parity.
- codeword can be punctured before sending to increase bandwidth
utilization, based on A and E parameters.
- low code rate can be achieved by choosing BG2 with high n and m and then reducing the message bits to A from (n-m), so with low A and high E, the code rate will be A/E which will be low as the codeword is mostly parity

CRC calculation of code block for ay data bus width desired.