Vendor: Aragio Solutions Category: GPIO

I3C I/O Library

The I3C library provides a bi-directional I/O driver designed for the I3C two-line interface.

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Overview

The I3C library provides a bi-directional I/O driver designed for the I3C two-line interface. It is compliant with the MIPI Specification for I3C –Version 1.1, 27 Novenber 2019.
The design supports the IC3 push-pull and open-drain modes as well as legacy Fm and Fm+ open-drain modes at the bus operating voltages of 1.2V and 1.8V.
This 5nm library is available in an inline flip chip implementation.
To design a functional I/O power domain with this cell, an additional library is required – 1.8V Support: Power. That library contains isolated analog I/O, and a full complement of power cells along with spacer cells to assemble a complete pad ring by abutment. An included rail splitter allows multiple power domains to be isolated in the same pad ring while

Key features

  • Supported I3C operating modes:
    • I3C push-pull mode – up to 12.5 MHz
    • I3C open-drain mode – up to 12.5 Mbps data rate
    • Legacy Fast mode (Fm) – up to 400 Kbps data rate
    • Legacy Fast mode (Fm+) – up to 1.0 Mbps data rate
    • Output enable and mode select
    • Receiver enable
    • Standard LVCMOS compatible input with optional Schmitt trigger (hysteresis)
    • ESD protection is accomplished with stacked NMOS breakdown devices
    • Power-on sequencing independent design with Power-On Control
    • DVDD = 1.2V or 1.8V
    • Pad VDDP (open-drain) = 1.65V to 1.95V or 1.20V to 1.30V – independent of DVDD
    • The circuit consumes no DC supply current in the static state in the open-drain modes
    • Fault-tolerant to 1.98V at PAD (no current flow when DVDD = 0V)
  • In open-drain modes, this cell requires a pull-up to a high voltage power supply (VDDP). The sizing of an external resistor or appropriate pull-up network is application dependent.

What’s Included?

  • Physical abstract in LEF format (.lef)
  • Timing models in Synopsys Liberty formats (.lib and .db)
  • Calibre compatible LVS netlist in CDL format (.cdl)
  • GDSII stream (.gds)
  • Behavioral Verilog (.v)
  • Layout Parasitic Extraction (LPE) SPICE netlist (.spice)
  • Databook (.pdf)
  • Library User Guide - ESD Guidelines (.pdf)

Specifications

Identity

Part Number
RGO_TSMC05_15V18_N5_45F_I3C
Vendor
Aragio Solutions
Type
Silicon IP

Provider

Aragio Solutions
HQ: USA
Aragio is a limited liability corporation (LLC) with headquarters in Plano, Texas. The Company is a full-service provider of semiconductor intellectual property (IP) for integrated circuit (IC) design. Aragio focuses on design solutions for input/output (I/O) system interface cells used for package interconnect. Full I/O library solutions, with robust electrostatic discharge (ESD) protection, are provided for complex integrated circuit padring designs. Aragio serves a very niche market for I/O libraries within the semiconductor industry. The company provides uniform I/O pad sets for a wide range of applications, semiconductor foundries and technologies. It is significant that all IP is owned by Aragio Solutions and nearly all IP developed since the company was formed in 2003 is still in demand and will continue to be in demand for the next decade. As a recognized world leader, Aragio provides its services to numerous clients across Southeast Asia, China, Japan, Europe, and North America.
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Frequently asked questions about GPIO Pad Library IP cores

What is I3C I/O Library?

I3C I/O Library is a GPIO IP core from Aragio Solutions listed on Semi IP Hub.

How should engineers evaluate this GPIO?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this GPIO IP.

Can this semiconductor IP be compared with similar products?

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