Vendor: Ceva, Inc. Category: DSP Core

Vision AI DSP

Ceva-SensPro is a family of DSP cores architected to combine vision, Radar, and AI processing in a single architecture.

Overview

Ceva-SensPro is a family of DSP cores architected to combine vision, Radar, and AI processing in a single architecture. The silicon-proven cores provide scalable performance to cover a wide range of applications that combine vision processing, Radar/LiDAR processing, and AI inferencing to interpret their surroundings. These include automotive, robotics, surveillance, AR/VR, mobile devices, and smart homes.

The Solution

The Ceva-SensPro DSP family unites scalar processing units and vector processing units under an 8-way VLIW architecture. The family incorporates advanced control features such as a branch target buffer and a loop buffer to speed up execution and reduce power. There are six family members, each with a different array of MACs, targeted at different application areas and performance points. These range from the Ceva-SP100, providing 128 8-bit integer or 32 16-bit integer MACs at 0.2 TOPS performance for compact applications such as vision processing in wearables and mobile devices; to the Ceva-SP1000, with 1024 8-bit or 256 16-bit MACs reaching 2 TOPS for demanding applications such as automotive, robotics, and surveillance.

Two of the family members, the Ceva-SPF2 and Ceva-SPF4, employ 32 or 64 32-bit floating-point MACs, respectively, for applications in electric-vehicle power-train control and battery management. These two members are supported by libraries for Eigen Linear Algebra, MATLAB vector operations, and the TVM graph compiler. Highly configurable, the vector processing units in all family members can add domain-specific instructions for such areas as vision processing, Radar, or simultaneous localization and mapping (SLAM) for robotics.

Integer family members can also add optional floating-point capabilities. All family members have independent instruction and data memory subsystems and a Ceva-Connect queue manager for AXI-attached accelerators or coprocessors. The Ceva-SensPro2 family is programmable in C/C++ as well as in Halide and Open MP, and supported by an Eclipse-based development environment, extensive libraries spanning a wide range of applications, and the Ceva-NeuPro Studio AI development environment.

Key features

  • Designed to integrate vision processing and inference in a single architecture
  • 8-way VLIW architecture managing both scalar and vector processing
  • Huge performance range, from 128 8-bit integer MACs and 0.2 TOPS to 1024 8-bit integer MACs and 2 TOPS
  • Optional 32-bit floating point scalable to 64 single-precision or 128 half-precision floating point MACs
  • Optional instruction-set extensions for specific application domains including Radar, LiDAR, vision, and simultaneous localization and mapping for robotics
  • Development tools include LLVM C/C++ compiler, support for higher programing languages of Halide and Open MP, an Eclipse-based development environment, and support in Ceva-NeuPro Studio AI SDK
  • Domain-specific libraries for Computer Vision, DSP, AI, SLAM, Image Signal Processing, and Radar
  • ASIL-B compliant, with ASIL-D support for mission-critical automotive applications

Block Diagram

Benefits

  • The Ceva-SensPro DSPs are architected to deliver environmental awareness through a blend of vision processing, sensor fusion, and deep-learning models in an embedded/edge computing environment. Covering the huge range of performance levels from 0.2 TOPS to 2 TOPS, offering both integer and floating-point implementations, and with a correspondingly wide range of area and power profiles, the family has a member ideal for any application—from lightweight wearables to automotive power-train control or robotics.
  • The architecture is optimized to perform multiple-sensor processing such as camera, Radar, LiDAR, or time-of-flight, followed by AI inference. Hardware support for multitasking allows efficient blending of these sensors processing and AI tasks on one platform, saving power and area by eliminating the need for separate sensor-processing DSP and AI accelerators, making the Ceva-SensPro an ideal embedded vision and AI processor.

Applications

  • Consumer IoT 
  • Automotive
  • Industrial 
  • Infrastructure
  • Mobile
  • PC 

Specifications

Identity

Part Number
Ceva-SensPro
Vendor
Ceva, Inc.
Type
Silicon IP

Files

Note: some files may require an NDA depending on provider policy.

Provider

Ceva, Inc.
HQ: USA
Ceva powers the Smart Edge, bridging the digital and physical worlds to bring AI-driven products to life. Our Ceva AI fabric portfolio of silicon and software IP enables devices to Connect, Sense, and Infer – the essential capabilities for the intelligent edge. From 5G, cellular IoT, Bluetooth, Wi-Fi, and UWB connectivity to scalable Edge AI NPUs, AI DSPs, sensor fusion processors and embedded software, Ceva provides the foundational IP for devices that connect, understand their environment, and act in real time. With more than 21 billion devices shipped and trusted by 400+ customers worldwide, Ceva is the backbone of today’s most advanced smart edge products – from AI-infused wearables and IoT devices to autonomous vehicles and 5G infrastructure. Our differentiated solutions deliver seamless integration into existing design flows, total flexibility to combine solutions based on design needs and ultra–low–power performance in minimal silicon footprint, helping customers accelerate development, reduce risk, and bring innovative products to market faster. As technology evolves toward Physical AI, Ceva’s IP portfolio lays the foundation for systems that are always connected, contextually aware, and capable of intelligent, real-time decision-making.

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Architecture Oriented C Optimizations

Know your hardware! That’s what it’s all about. Using programming guidelines derived from the processor’s architecture can dramatically improve performance of C applications. In some cases, it can even make the difference between having the application implemented in C and having it implemented in assembly. Well written C code and an advanced compiler that utilizes various architectural features often reach performance results similar to those of hand written assembly code.

Frequently asked questions about DSP Core IP cores

What is Vision AI DSP?

Vision AI DSP is a DSP Core IP core from Ceva, Inc. listed on Semi IP Hub.

How should engineers evaluate this DSP Core?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this DSP Core IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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