Vendor: SmartDV Technologies Category: GDDR

GDDR3 Synthesizable Transactor

GDDR3 Synthesizable Transactor provides a smart way to verify the GDDR3 component of a SOC or a ASIC in Emulator or FPGA platform.

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Overview

GDDR3 Synthesizable Transactor provides a smart way to verify the GDDR3 component of a SOC or a ASIC in Emulator or FPGA platform. The SmartDV's GDDR3 Synthesizable Transactor is fully compliant with standard GDDR3 Specification and provides the following features.

Key features

  • Supports 100% of GDDR3 protocol standard
  • Supports all the GDDR3 commands as per the specs
  • Supports all types of timing and protocol violation detection
  • Supports all mode registers programming
  • Supports 8 bank operation
  • Supports nominal and dynamic on-die termination (ODT) for data,strobe and mask signals
  • Checks for following:
    • Check-points include power on, initialization and power off rules
    • State based rules, active command rules
    • Read/write command rules etc
    • All timing violations
  • Supports bidirectional differential data strobe
  • Supports programmable burst length:
    • 4
    • 8
  • Supports programmable sequential/interleave burst mode
  • Supports programmable CAS read latency
  • Supports programmable CAS write latency
  • Supports selectable BL4 or BL8 on-the-fly (OTF)
  • Supports self refresh mode
  • Supports automatic self refresh(ASR)
  • Supports write leveling
  • Supports multipurpose register
  • Supports write data mask function
  • Supports output driver calibration
  • Supports on-die termination (ODT)
  • Notifies the test bench of significant events such as transactions, warnings, timing and protocol violations

Block Diagram

GDDR3 Transactor block diagram

Benefits

  • Compatible with testbench writing using SmartDV's VIP
  • All UVM sequences/testcases written with VIP can be reused
  • Runs in every major emulators environment
  • Runs in custom FPGA platforms

What’s Included?

  • Synthesizable transactors
  • Complete regression suite containing all the GDDR3 testcases
  • Examples showing how to connect various components, and usage of Synthesizable Transactor
  • Detailed documentation of all DPI, class, task and function's used in verification env
  • Documentation contains User's Guide and Release notes

Files

Product Sheet Download

Note: some files may require an NDA depending on provider policy.

Specifications

Identity

Part Number
GDDR3 Transactor
Vendor
SmartDV Technologies

Provider

SmartDV Technologies
HQ: India
At SmartDV Technologies™, we believe there’s a better way to approach semiconductor intellectual property (IP) for integrated circuits. We’ve been focused exclusively on IP since 2007—so whether you’re sourcing standards-based design IP for your next SoC, ASIC, or FPGA, or seeking verification solutions (VIP) to put your chip design through its paces, you’ll find SmartDV’s IP straightforward to integrate. By combining proprietary SmartCompiler™ technology with the knowledge of hundreds of expert engineers, SmartDV can customize IP to meet your unique design objectives: quickly, economically, and reliably. Don’t allow other suppliers to force onesize-fits-all cores into your chip design. Get the IP you need, tailored to your specifications, with SmartDV: IP Your Way.
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Frequently asked questions about GDDR IP

What is GDDR3 Synthesizable Transactor?

GDDR3 Synthesizable Transactor is a GDDR IP core from SmartDV Technologies listed on Semi IP Hub.

How should engineers evaluate this GDDR?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this GDDR IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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