3.3V to 1.2V voltage regulator - UMC 55nm
The cell is a low power series 3.3V to 1.2V voltage regulator.
- UMC
- 55nm
LDO Voltage Regulator IP cores provide low-noise linear voltage regulation for sensitive loads in modern SoC and ASIC designs.
These IP cores are widely used to create clean local supplies for analog, RF, sensor, and always-on circuits where noise and simplicity matter more than peak switching efficiency
This catalog allows you to compare LDO Voltage Regulator IP cores from leading vendors based on dropout voltage, output noise, load regulation, and process node compatibility.
Whether you are designing analog subsystems, RF circuits, sensor interfaces, or always-on domains, you can find the right LDO Voltage Regulator IP for your application.
3.3V to 1.2V voltage regulator - UMC 55nm
The cell is a low power series 3.3V to 1.2V voltage regulator.
U40LPLDO3P3V1 is a low DropOut(LDO) linear and high accuracy output regulator.
U40LPLDO2P5V1 is a low DropOut(LDO) linear and high accuracy output regulator.
U40LPLDO1P8V1 is a low DropOut(LDO) linear and high accuracy output regulator.
Ultra low power Voltage regulator - UMC 0.13um
The cell is a ultra low power series 3.3V to 1.2V voltage regulator.
60mA 3.3V to 1.8V regulator - UMC 0.18um
3.3V to 1.8V linear voltage regulator for up to 60mA load.
UMC 0.18um 5v-3.3v Power Regulator
Based on UMC 0.18um 3.3v/1.8v Logic Process, current design of Power Regulator is to provide the 3.3v voltage output regulated fr…
UMC 0.18um 5v-3.3v Power Regulator
Based on UMC 0.18um 3.3v/1.8v Logic Process, current design of a Power Regulator is to provide a 3.3v voltage output regulated fr…
UMC 0.18um 3.3v-1.8v 150mA Power Regulator
Power Regulator, also called Voltage Regulator, is an on-chip device which provides suitable power supply for the core by regulat…
Source Low Dropout Linear Regulator for Cascade IO ; UMC 28nm HPC Process
Source Low Dropout Linear Regulator for Cascade IO ; UMC 28nm HPC Process
2 port Linear regulator for FXSATA168HD0A ; UMC 90nm SP/RVT LowK Logic Process
2 port Linear regulator for FXSATA168HD0A ; UMC 90nm SP/RVT LowK Logic Process
Source and Sink Current 100mA LDO for 28nm cascade I/O, UMC 28nm HPC Logic and Mixed-Mode Process
Source and Sink Current 100mA LDO for 28nm cascade I/O, UMC 28nm HPC Logic and Mixed-Mode Process
3.3V to 0.75*VCC33A with 5mA driving capability with external capacitor; Linear Regulator; UMC 55nm LP/RVT LowK Logic Process
3.3V to 2.5V with 5mA driving capability; Capacitor-free Linear Regulator; UMC 0.11um HS/AE Logic Process
3.3V to 2.5V with 5mA driving capability; Capacitor-free Linear Regulator; UMC 28nm HPC Process
3.3V to 2.5V with 5mA driving capability; Capacitor-free Linear Regulator; UMC 28nm HPC Process
3.3V to 2.5V with 5mA driving capability; Capacitor-free Linear Regulator; UMC 40nm Logic/Mixed-Mode Low Power Process
3.3V to 1.1V /50mA REG; Linear Regulator; UMC 40nm LP/RVT LowK Logic Process_x005F_x000D_
3.3V to 1.1V /50mA REG; Linear Regulator; UMC 40nm LP/RVT LowK Logic Process
3.3V to 2.0V with 288mA driving capability with external capacitor,use trimming ports (need e-Fuse IP); Linear Regulator; UMC 28n…
3.3V to 1.2V/0.9V with 100mA driving capability;Linear Regulator, UMC 55nm uLP/HVT Low-K Logic Process
3.3V to 1.2V/0.9V with 100mA driving capability;Linear Regulator, UMC 55nm uLP/RVT Low-K Logic Process