IBM IP Cores

IBM 65nm LPE 1.2V3.3V Level Shifter Library

• IBM
• 65nm
• LPe
• Silicon Proven

IBM 65nm LPE 1.2V3.3V Level Shifter Library

• IBM
• 65nm
• LPe
• Silicon Proven

IBM 65nm LPE 3.3V Standard Cell Library

• IBM
• 65nm
• LPe
• Silicon Proven

This is a crystal oscillator specifically designed for low power application.

• IBM
• 65nm
• LPe

The VeriSilicon I65LPEV25_ADC_06 IP is a 2.5V 10Bit 40MHz pipeline analog to digital converter capable of running at up to 80MHz …

• IBM
• 65nm
• LPe

VeriSilicon IBM 65nm 1.0V/2.5V VPPIO_01 IO library developed by VeriSilicon is optimized for IBM 65nm 10sf 1.0/2.5V process.

• IBM
• 65nm
• LPe

The present IP is a Voltage Detector (VDT) circuit.

• IBM
• 65nm
• LPe

The present Power-On-Reset circuit generates system reset pulses (RST) when both the 3.3V and 1.0V power suppliers are turned on.

• IBM
• 65nm
• LPe

The present Power-On-Reset circuit generates system reset pulses (RST) when the 3.3V power supplier is turned on.

• IBM
• 65nm
• LPe

Designed for audio clock generation, this PLL integrates a phase frequency detector (PFD), a loop filter (LP), a voltage control …

• IBM
• 65nm
• LPe

This analog-to-digital converter uses Successive Approximation Register (SAR) architecture to achieve 12-bit resolution.

• IBM
• 65nm
• LPe

The present Power-On-Reset circuit generates system reset pulses (RST) when both the 3.3V and 1.2V power suppliers are turned on.

• IBM
• 65nm
• LPe

The I65LPEV25_AMP_01 specifies a rail-to-rail voltage reference buffer.

• IBM
• 65nm
• LPe

The I65GV25_CODEC_04 integrates: 2-channel 24-bit sigma-delta ADC, 2-channel 24-bit sigma-delta DAC with headphone driver amplifi…

• IBM
• 65nm
• LPe

This analog 2-1 MUX is designed for low speed application.

• IBM
• 65nm
• LPe

This IP specifies a 1-channel 10-bit resolution, high performance, low power CMOS digital-to-analog converter (DAC) which offers …

• IBM
• 65nm
• LPe

The I65LPEV25_CODEC_04B integrates: 2-channel 24bit sigma-delta ADC, 2-channel 24bit sigma-delta DAC with headphone driver amplif…

• IBM
• 65nm
• LPe

This analog-to-digital converter (ADC) uses successive approximation register (SAR) architecture to achieve 12-bit resolution.

• IBM
• 65nm
• LPe

The Mini-LVDS transmitter converts up to 64-bit CMOS data into 16-pairs of Mini-LVDS data stream that can support Single-Link tra…

• IBM
• 65nm
• LPe

The LVDS transmitter converts 28-bit data into 4-pair LVDS data stream.

• IBM
• 65nm
• LPe
• Silicon Proven