Vendor: Arteris Category: Network-On-Chip

FlexWay Interconnect IP

Entry-level network-on-chip (NoC) IP for low power and cost efficiency.

Overview

Entry-level network-on-chip (NoC) IP for low power and cost efficiency.

Arteris FlexWay® 5 network-on-chip (NoC) IP is particularly well suited to cost-efficient, low-power IoT edge devices and microcontrollers (MCUs).

It revolutionizes SoC development with:

  • Optimized interconnects
  • Reduced time to market
  • Improved performance
  • Lower power consumption
  • Compact die size

By automating design tasks and supporting tailored topologies, FlexWay enhances system responsiveness and includes features to help optimize battery life, system integrity and performance. FlexWay 5 is used around the world for secure, performant, and resilient designs in mobile, automotive, consumer, and enterprise applications.

Key features

  • Multi-clock/power/voltage domains and power management with unit-level clock gating
  • Multi-protocol support including AMBA 5 with QoS bandwidth regulator and limiter
  • Integrated SystemC simulation and UVM verification support
  • Import and Export to Magillem tools
  • AMBA 5 support of DVM 8.1 (Distributed Virtual Memory)
  • On-chip performance monitoring and debug
  • Debug and trace with ATB 128b and timestamps

Benefits

Flexible topologies

FlexWay is generated from simple elementary components which are combined using a powerful set of algorithms and an intuitive GUI, making it possible to build the optimal topology for embedded applications.

Small to medium SoCs

FlexWay supports simple to medium-complexity designs and easily scales efficiently between the two, containing only the optimum configuration required.

Huge bandwidth

FlexWay is uncompromising in how it drives performant on-chip dataflow despite its power-efficient design.

Specifications

Identity

Part Number
FlexWay Interconnect IP
Vendor
Arteris
Type
Silicon IP

Files

Note: some files may require an NDA depending on provider policy.

Provider

Arteris
HQ: United States
Arteris is a leading provider of semiconductor technology that accelerates the creation of high-performance, power-efficient silicon with built-in safety, reliability, and security. Innovative Arteris products are designed to optimize data movement and help ease complexity in the modern AI era with network-on-chip (NoC) interconnect intellectual property (IP), system-on-chip (SoC) software for integration automation and hardware security assurance. All are used by the world’s top technology companies to improve overall performance and engineering productivity, reduce risk, lower costs, and bring cutting-edge designs to market faster.

Learn more about Network-On-Chip IP core

Secure Multi-Path Routing with All-or-Nothing Transform for Network-on-Chip Architectures

Ensuring Network-on-Chip (NoC) security is crucial to design trustworthy NoC-based System-on-Chip (SoC) architectures. While there are various threats that exploit on-chip communication vulnerabilities, eavesdropping attacks via malicious nodes are among the most common and stealthy. Although encryption can secure packets for confidentiality, it may introduce unacceptable overhead for resource-constrained SoCs.

Why verification matters in network-on-chip (NoC) design

In this article, we will dive deeper into a comprehensive methodology for formally verifying an NoC, showcasing the approaches and techniques that ensure our NoC designs are robust, efficient, and ready to meet the challenges of modern computing environments.

SoC design: When a network-on-chip meets cache coherency

Many people have heard the term cache coherency without fully understanding the considerations in the context of system-on-chip (SoC) devices, especially those using a network-on-chip (NoC). To understand the issues at hand, it’s first necessary to understand the role of cache in the memory hierarchy.

Accelerating RISC-V development with network-on-chip IP

In the world of system-on-chip (SoC) devices, architects encounter many options when configuring the processor subsystem. Choices range from single processor cores to clusters to multiple core clusters that are predominantly heterogeneous but occasionally homogeneous.

Network-on-chip (NoC) interconnect topologies explained

Today’s complex system-on-chip (SoC) designs can contain between tens to hundreds of IP blocks. Each IP block may have its own data width and clock frequency and employ one of the standard SoC interface protocols: OCP, APB, AHB, AXI, STBus, and DTL. Connecting all these IPs is a significant challenge.

Frequently asked questions about NoC IP cores

What is FlexWay Interconnect IP?

FlexWay Interconnect IP is a Network-On-Chip IP core from Arteris listed on Semi IP Hub.

How should engineers evaluate this Network-On-Chip?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Network-On-Chip IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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