Vendor: SmartDV Technologies Category: MRAM / RRAM

Excelon FRAM Memory Model

Excelon FRAM Memory Model provides an smart way to verify the Excelon FRAM component of a SOC or a ASIC.

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Overview

Excelon FRAM Memory Model provides an smart way to verify the Excelon FRAM component of a SOC or a ASIC. The SmartDV's Excelon FRAM memory model is fully compliant with standard Excelon FRAM Specification and provides the following features. Better than Denali Memory Models.

Excelon FRAM Memory Model is supported natively in SystemVerilog, VMM, RVM, AVM, OVM, UVM, Verilog, SystemC, VERA, Specman E and non-standard verification env

Excelon FRAM Memory Model comes with optional Smart Visual Protocol Debugger (Smart ViPDebug), which is GUI based debugger to speed up debugging.

Key features

  • Supports Excelon FRAM memory devices from all leading vendors.
  • Supports 100% of Excelon FRAM protocol standard CY15B104QN, CY15B108QN, CY15B102QN, CY15B104QI, CY15B104QSN, CY15B108QI.
  • Supports all the Excelon FRAM commands as per the specs.
  • Quickly validates the implementation of the Excelon FRAM standard CY15B104QN, CY15B108QN, CY15B102QN, CY15B104QI, CY15B104QSN, CY15B108QI.
  • Supports for 4-Mbit ferroelectric random access memory (F-RAM) logically organized as 512K×8
  • Supports for 8-Mbit ferroelectric random access memory (F-RAM) logically organized as 1024K×8
  • Supports for 2-Mbit ferroelectric random access memory (F-RAM) logically organized as 256K×8
  • Supports for Fast serial peripheral interface (SPI)
  • Supports for Device ID and Serial Number
    • Device ID includes manufacturer ID and product ID
    • Unique ID
    • Serial Number
  • Supports for Sophisticated write protection scheme
    • Hardware protection using the Write Protect (WP) pin
    • Software protection using Write Disable (WRDI) instruction
    • Software block protection for 1/4, 1/2, or entire array
  • Supports for Dedicated 256-byte special sector F-RAM
    • Dedicated special sector write and read
    • Content can survive up to three standard reflow cycles
  • Supports programmable clock frequency of operation.
  • Supports for all types of timing and protocol violation detection.
  • Checks for following
    • Check-points include power on, Initialization and power off rules,
    • State based rules, Active Command rules,
    • Read/Write Command rules etc.
    • All timing violations.
  • Constantly monitors Excelon FRAM behavior during simulation.
  • Supports Protocol checker fully compliant with Excelon FRAM Specification CY15B104QN, CY15B108QN, CY15B102QN, CY15B104QI, CY15B104QSN, CY15B108QI.
  • Notifies the test bench of significant events such as transactions, warnings, timing and protocol violations.
  • Built in functional coverage analysis.
  • Supports Callbacks, so that user can access the data observed by monitor.

Block Diagram

Excelon FRAM Memory Model block diagram

Benefits

  • Faster testbench development and more complete verification of Excelon FRAM designs.
  • Easy to use command interface simplifies monitor control and configuration.
  • Simplifies results analysis.
  • Runs in every major simulation environment.

What’s Included?

  • Complete regression suite containing all the Excelon FRAM testcases.
  • Complete UVM/OVM sequence library for Excelon FRAM controller.
  • Examples showing how to connect and usage of Model.
  • Detailed documentation of all class, task and function's used in verification env.
  • Documentation also contains User's Guide and Release notes.

Files

Product Sheet Download

Note: some files may require an NDA depending on provider policy.

Specifications

Identity

Part Number
Excelon FRAM Memory Model
Vendor
SmartDV Technologies

Provider

SmartDV Technologies
HQ: India
At SmartDV Technologies™, we believe there’s a better way to approach semiconductor intellectual property (IP) for integrated circuits. We’ve been focused exclusively on IP since 2007—so whether you’re sourcing standards-based design IP for your next SoC, ASIC, or FPGA, or seeking verification solutions (VIP) to put your chip design through its paces, you’ll find SmartDV’s IP straightforward to integrate. By combining proprietary SmartCompiler™ technology with the knowledge of hundreds of expert engineers, SmartDV can customize IP to meet your unique design objectives: quickly, economically, and reliably. Don’t allow other suppliers to force onesize-fits-all cores into your chip design. Get the IP you need, tailored to your specifications, with SmartDV: IP Your Way.
Contact SmartDV Technologies

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Frequently asked questions about MRAM / RRAM IP cores

What is Excelon FRAM Memory Model?

Excelon FRAM Memory Model is a MRAM / RRAM IP core from SmartDV Technologies listed on Semi IP Hub.

How should engineers evaluate this MRAM / RRAM?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this MRAM / RRAM IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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