Vendor: Aragio Solutions Category: GPIO

subLVDS I/O Pad Set

The subLVDS library provides a subLVDS driver, receiver, and temperature stable voltage reference capable of supporting 16 driver…

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SMIC 40nm Silicon Proven View all specifications

Overview

The subLVDS library provides a subLVDS driver, receiver, and
temperature stable voltage reference capable of supporting 16 drivers
operating at data rates up to 1600 Mbps. The pad set includes a full
complement of power, spacer, and adapter cells to assemble a
complete pad ring by abutment. An included rail splitter allows
isolated subLVDS domains to be placed in the same pad ring with
other power domains while maintaining continuous VDD/VSS in the
pad ring for robust ESD protection.

Key features

  • Input receive sensitivity of 50mV peak differential (without hysteresis)
  • Common mode range from 0.4V to 1.6V (limited by Power Supply)
  • Powered by 1.8V I/O and 1.1V core supplies
  • Power consumption: 3.4 mW max @ 800 MHz

What’s Included?

  • a. Physical abstract in LEF format (.lef)
  • b. Timing models in Synopsys Liberty formats (.lib and .db)
  • c. Calibre compatible LVS netlist in CDL format (.cdl)
  • d. GDSII stream (.gds)
  • e. Behavioral Verilog (.v)
  • f. Layout Parasitic Extraction (LPE) SPICE netlist (.spice)
  • g. Databook (.pdf)
  • h. Library User Guide - ESD Guidelines (.pdf)

Silicon Options

Foundry Node Process Maturity
SMIC 40nm 40nm 400 nm Silicon Proven

Specifications

Identity

Part Number
RGO_SMIC40_25V18_LL_UC_SUBLVDS
Vendor
Aragio Solutions
Type
Silicon IP

Files

Product Sheet Download

Note: some files may require an NDA depending on provider policy.

Provider

Aragio Solutions
HQ: USA
Aragio is a limited liability corporation (LLC) with headquarters in Plano, Texas. The Company is a full-service provider of semiconductor intellectual property (IP) for integrated circuit (IC) design. Aragio focuses on design solutions for input/output (I/O) system interface cells used for package interconnect. Full I/O library solutions, with robust electrostatic discharge (ESD) protection, are provided for complex integrated circuit padring designs. Aragio serves a very niche market for I/O libraries within the semiconductor industry. The company provides uniform I/O pad sets for a wide range of applications, semiconductor foundries and technologies. It is significant that all IP is owned by Aragio Solutions and nearly all IP developed since the company was formed in 2003 is still in demand and will continue to be in demand for the next decade. As a recognized world leader, Aragio provides its services to numerous clients across Southeast Asia, China, Japan, Europe, and North America.
Contact Aragio Solutions

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Frequently asked questions about GPIO Pad Library IP cores

What is subLVDS I/O Pad Set?

subLVDS I/O Pad Set is a GPIO IP core from Aragio Solutions listed on Semi IP Hub. It is listed with support for smic Silicon Proven.

How should engineers evaluate this GPIO?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this GPIO IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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