Provider
Key ASIC was incorporated in the year 2005. In 2006, we were awarded Multimedia Super Corridor (MSC) Status by the Malaysia Digital Economy Corporation (MDEC). We started with the design of IP, ASIC, and SoC. In 2009, we were listed on the main board of KLSE. Khazanah and CIMB are our main investors.
Key ASIC is not only a leading ASIC / SoC design service company, we are also a turnkey service company from spec-in to system module that focuses on AI chips, IoT, and medical applications. We are committed to providing customers with competitive SoC professional one-stop design services in terms of PPA (Performance, Power, and Area).
Based in Kuala Lumpur, Malaysia with R&D Centers in Malaysia and Tai Yuen Hi-Tech Industrial Park Taiwan, Key ASIC provides ODM and OEM of ASIC design services from Specification, RTL, Netlist to silicon, as well as process migration from GDSII.
Our experienced SoC designer and engineers combined with extensive manufacturing, logistics resources, and a flexible engagement model can provide Key ASIC customers with a comprehensive support system for modular ASIC innovation from IP development through prototype to production.
Learn more about GPIO IP core
For over a decade, Sofics has collaborated with CERN, the European Organization for Nuclear Research. Sofics has delivered advanced GPIO cells tailored for radiation-hardened applications, supporting CERN’s groundbreaking particle physics experiments.
This paper provides a complete solution to the GPIO Verification for any SoC. GPIO interface is available in every ASIC. To avoid duplicate efforts and (save) time to verify the GPIO interface, we have produced this Generic GPIO verification suite. It is a UVM-based verification environment, with all the necessary subcomponents that are required to verify any GPIO design.
To complete our task as engineers we rely on the tools we use. We collaborated with Siemens EDA solutions back in 2025 on a webinar about how we use their tools to develop our designs and layouts.
Post-quantum cryptography (PQC) is moving from theory to engineering reality. With NIST-standardized algorithms ML-KEM (FIPS 203) and ML-DSA (FIPS 204) now finalized, FPGA developers face a practical challenge: How to integrate these algorithms efficiently on resource-constrained hardware?
The I2C (Inter-Integrated Circuit) Bus invented in 1980 by Philips Semiconductors (NXP Semiconductors today) was a massive step forward in simplifying communications in embedded systems. It is a simple two-wire interface for synchronous, multi-master/multi-slave, single ended serial communication. Fast forward 45 years to today and it is still widely used for attaching low speed peripheral Integrated Circuits (ICs), processors and microcontrollers. But silicon today has changed...