The Joint Test Action Group (JTAG) is the IEEE1149.1 Standard Test Access Port (TAP) and Boundary Scan Architecture.
Giving a full access to the internal system components of the device, the TAP interface can be a backdoor for hackers.
Secure-IC offers a set of tools to secure the access to the device. Thanks to an Hardware Authentication process, only authorized user can access the debug interface of the system and interact with its elements. This solution can be deployed in the Securyzr iSE or as a standalone IP.
Secure Debug can be used for the following activities in an iSE:
- First Programming
- Debug purpose
- Key injection/generation
- On-site Firmware injection/update
- Get life-cycle information from the HSM
- Provide a Hardware Authentication scheme
- Allow only one HOST to be logged at the same time
- Open the HSM debug port only if life cycle mode values allows it
- Receive Maintenance requests (first programming, update, lifecycle ...) from an external user