Binary-FSK Demodulator

BFSK_DEMOD is a precision Binary-FSK Demodulator IP Core based on a non-coherent receiver design. The demodulator is fully programmable, allowing for a varied range of symbol rates and mark/space tone frequencies. Input data samples may be either complex or real for support of either passband or baseband signals. The module allows easy connectivity to an external ADC with up to 16-bit signed input samples.

The mark and space tone frequencies are generated by a pair of precision local oscillators. Each oscillator is implemented as a DDS with an SFDR of better than 80 dBs and a theoretical SNR of approximately 100 dBs.

After mixing, the I and Q signal paths for each tone are filtered to remove components above the mark and space centre frequencies. The characteristics of these filters may be changed depending on the desired FSK signal bandwidth.

A power function is used to compute the relative magnitudes of the mark/space tones after filtering. These magnitudes are then compared and passed to the symbol decode and timing recovery circuit. The signal mag_out is a 16-bit signed output that allows the user to monitor the magnitude of the output symbols before decode and timing recovery.

The demodulated FSK bit-stream appears at the output fsk_out. Bits are valid on the rising edge of clk when fsk_val is high.

• Technology independent IP Core for FPGA and ASIC
• Supplied as human readable VHDL (or Verilog) source code
• 16-bit signed input data samples
• Accepts either complex (I/Q) or real input samples
• Programmable mark / space frequencies
• Choice of low pass filter responses
• Carrier separation ~ symbol rate or greater
• Practical symbol rates of up to 10 Mbits/s
• Baseband or passband operation
• Typical FPGA sample rates of up to 200 MHz1
• Connects directly to an external ADC

• Software radio
• Short range telemetry
• SRD and ISM band devices
• Low cost RF applications for FPGA