Vendor: SmartDV Technologies Category: ARINC 429

ARINC 429 Synthesizable Transactor

ARINC 429 Synthesizable Transactor provides an smart way to verify the ARINC 429 component of a SOC or a ASIC in Emulator or FPGA…

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Overview

ARINC 429 Synthesizable Transactor provides an smart way to verify the ARINC 429 component of a SOC or a ASIC in Emulator or FPGA platform. ARINC 429 Synthesizable Verification IP implements the air transport industry’s standards for the transfer of digital data between avionics systems. ARINC 429 Synthesizable Transactor provides an smart way to verify the ARINC 429 standard data transmission and control interfaces between source and sink. The SmartDV's ARINC 429 Synthesizable Transactor is fully compliant with ARINC SPECIFICATION 429 PART 1-17 and provides the following features.

Key features

  • Supports ARINC SPECIFICATION 429 PART 1-17
  • Supports all word structures and protocol necessary to establish bus communication as per the specs
  • Supports simplex, twisted shielded pair data bus standard Mark 33 Digital Information Transfer System bus
  • Supports LRU with multiple transmitters and receivers communicating on different buses
  • Supports 32 bit words containing a 24 bit data portion containing the actual information, and an 8 bit label describing the data itself
  • Supports Transmission rates at either a low speed 12.5 kHz or a high speed 100kHz
  • Supports two speeds for data transmission
    • Low speed operation 12.5 kHz, with an actual allowable range of 12 to 14.5 kHz
    • High speed operation is 100 kHz
  • Supports bipolar and Return-to-Zero encoding format
  • Supports following data types
    • Binary BNR Transmitted in fractional two's complement notation
    • Binary Coded Decimal BCD Numerical subset of ISO Alphabet No. 5
    • Discrete Data Combination of BNR, BCD or individual bit representation
    • Maintenance Data and Acknowledgement Requires two-way communication
    • Williamsburg/Buckhorn Protocol A bit-oriented protocol for file transfers
  • Supports duplex or two-way communication in Maintenance Data and Acknowledgement between source and sink
  • Supports glitch injection and detection
  • Supports all types of errors insertion/detection as given below:
    • Missing SOT word
    • LDU Sequence Number Error
    • Parity Errors
    • Word Count Errors
    • CRC Errors
    • Time Out Errors

Block Diagram

ARINC 429 Transactor block diagram

Benefits

  • Compatible with testbench writing using SmartDV's VIP
  • All UVM sequences/testcases written with VIP can be reused
  • Runs in every major emulators environment
  • Runs in custom FPGA platforms

What’s Included?

  • Synthesizable transactors
  • Complete regression suite containing all the ARINC 429 testcases
  • Examples showing how to connect various components, and usage of Synthesiable VIP
  • Detailed documentation of all DPI, class, task and functions used in verification env
  • Documentation contains User's Guide and Release notes

Specifications

Identity

Part Number
ARINC 429 Transactor
Vendor
SmartDV Technologies
Type
Silicon IP

Files

Product Sheet Download

Note: some files may require an NDA depending on provider policy.

Provider

SmartDV Technologies
HQ: India
At SmartDV Technologies™, we believe there’s a better way to approach semiconductor intellectual property (IP) for integrated circuits. We’ve been focused exclusively on IP since 2007—so whether you’re sourcing standards-based design IP for your next SoC, ASIC, or FPGA, or seeking verification solutions (VIP) to put your chip design through its paces, you’ll find SmartDV’s IP straightforward to integrate. By combining proprietary SmartCompiler™ technology with the knowledge of hundreds of expert engineers, SmartDV can customize IP to meet your unique design objectives: quickly, economically, and reliably. Don’t allow other suppliers to force onesize-fits-all cores into your chip design. Get the IP you need, tailored to your specifications, with SmartDV: IP Your Way.
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Learn more about ARINC 429 IP core

Time Sensitive Networking for Aerospace

This white paper highlights the integration of Time-Sensitive Networking (TSN) in the aerospace industry. It provides an overview of TSN standards and profiles and the IEEE P802.1DP standard relevant to aerospace applications. It also discusses key topics such as time synchronization, latency, resource management, and reliability in the context of TSN.

Frequently asked questions about ARINC-429 IP cores

What is ARINC 429 Synthesizable Transactor?

ARINC 429 Synthesizable Transactor is a ARINC 429 IP core from SmartDV Technologies listed on Semi IP Hub.

How should engineers evaluate this ARINC 429?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this ARINC 429 IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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