ARINC 419 Verification IP
ARINC 419 Verification IP implements the digital transmision systems have been specified for inter-unit and inter-sytems communic…
Overview
ARINC 419 Verification IP implements the digital transmision systems have been specified for inter-unit and inter-sytems communications on board transport aircraft. ARINC 419 Verification IP provides an smart way to verify the ARINC 419 standard data transmission and control interfaces between source and sink. The SmartDV's ARINC 419 Verification IP is fully compliant with ARINC REPORT 419 - 3 and provides the following features.
ARINC 419 Verification IP is supported natively in SystemVerilog, VMM, RVM, AVM, OVM, UVM, Verilog, SystemC, VERA, Specman E and non-standard verification env
ARINC 419 Verification IP comes with optional Smart Visual Protocol Debugger (Smart ViPDebug), which is GUI based debugger to speed up debugging.
Key features
- Supports ARINC REPORT 419 - 3.
- Supports 32 bit words containing a 24 bit data portion containing the actual information, and an 8 bit label describing the data itself.
- Supports Transmission rates at 11 ± 3.5 kbps.
- Supports Bipolar Return-to-Zero encoding format.
- Supports following data types
- Binary – BNR – Transmitted in fractional two’s complement notation
- Binary Coded Decimal – BCD – Numerical subset of ISO Alphabet No. 5
- Maintenance Data and Acknowledgement - Requires two-way communication
- Supports duplex or two-way communication in Maintenance Data and acknowledgement between source and sink
- Supports all types of error insertion/detections as given below:
- Parity Errors
- Word count errors
- Synchronization errors
- Invalid label Errors
- Notifies the testbench of significant events such as transactions, warnings, and protocol violations.
- Status counters for various events.
- Callbacks in source and sink for various events.
- Built in functional coverage analysis.
- FIFO depth programmable.
- ARINC 419 Verification IP comes with complete testsuite to verify each and every feature of ARINC REPORT 419 - 3.
Block Diagram
Benefits
- Faster testbench development and more complete verification of ARINC 419 designs.
- Easy to use command interface simplifies testbench control and configuration of Source,Sink and monitor
- Simplifies results analysis.
- Runs in every major simulation environment.
What’s Included?
- Complete regression suite containing all the ARINC 419 testcases.
- Examples showing how to connect various components, and usage of Source,Sink and Monitor.
- Detailed documentation of all class, task and function's used in verification env.
- Documentation also contains User's Guide and Release notes.
Specifications
Identity
Files
Note: some files may require an NDA depending on provider policy.
Provider
Learn more about ARINC 429 IP core
IP Based System Design for Aerospace and Military - The Time is Now
Embedded Systems -> RTOSes shield from net-centric bugs
Frequently asked questions about ARINC-429 IP cores
What is ARINC 419 Verification IP?
ARINC 419 Verification IP is a ARINC 429 IP core from SmartDV Technologies listed on Semi IP Hub.
How should engineers evaluate this ARINC 429?
Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this ARINC 429 IP.
Can this semiconductor IP be compared with similar products?
Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.