Vendor: Silvaco, Inc. Category: DMA

AHB Single Channel DMA Controller

The DMA is a configurable single channel direct memory access controller.

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Overview

The DMA is a configurable single channel direct memory access controller. The DMA IP Core is a Verilog HDL design that can be used in ASIC, Structured ASIC and FPGA designs. The design is intended to be used with AMBA based systems as a controller to transfer data directly from system memory to memory or system memory to peripheral device or IP Core.

Once set up, the DMA controller is primarily an AHB Master, which initiates data transfers across the AHB bus to/from a peripheral device through the DMA Buffer. The DMA Buffer is a scalable x32bit FIFO, which is useful for peripheral devices requiring a steady stream of data such as an LCD Controller, Ethernet MAC or other communication device.

The DMA controller contains useful features such incrementing and non-incrementing addressing and link list operation. Linked list support is useful for non-contiguous memory transfer operations.

Multiple DMA controllers can be placed in the AHB System to provide multiple channel DMA control.

Key features

  • AHB Master/Slave DMA Controller
  • Single Channel – multiple instantiation
  • Memory to Memory, Memory to Peripheral, Peripheral to Memory, Peripheral to Peripheral modes
  • Source and destination address descriptors
  • Single word and burst transfer requests
  • Programmable burst size
  • Current address status
  • Incrementing and non-incrementing addressing
  • Linked list support
  • Transfer complete interrupt

Block Diagram

AHB Single Channel DMA Controller block diagram

What’s Included?

  • Verilog Source
  • Complete Test Environment
  • AHB Bus Functional Model

Files

Product Sheet Download

Note: some files may require an NDA depending on provider policy.

Specifications

Identity

Part Number
AHB Single Channel DMA Controller
Vendor
Silvaco, Inc.

Provider

Silvaco, Inc.
HQ: United States
Silvaco focuses on enabling the next generation of AI/ML, Cloud/Datacenter, Automotive and Autonomous Driving, IoT and 5G designs through a comprehensive offering of Silicon proven IP. Our portfolio includes a complete catalog of Interface IP, Amba Peripherals, Subsystems, MIPI IP and Automotive Communication Controller IP. Our experienced ASIC and Embedded Software designers have a rich history of designing SOCs with embedded microprocessors which are crucial to building small connected smart chips.
Contact Silvaco, Inc.

Learn more about DMA IP core

DMA IP Integration

There are many IP’s today . These IP’s can be simple IP’s like Timer to complex IP’s like Accelerators. In Most of the cases IP’s are Integrated in standard way. There are cases where you have the option of Integrating it differently. This goes un-noticed or unable to be implemented due to time constraints. One such IP that would be discussed in this paper is DMA . This paper tries to explain idea of Integrating Direct Memory access(DMA) and Interrupt Control Unit(ICU) differently but final implementation requires some changes in IP. There is a possibility that alternate design explained below may be already implemented.

Frequently asked questions about DMA IP

What is AHB Single Channel DMA Controller?

AHB Single Channel DMA Controller is a DMA IP core from Silvaco, Inc. listed on Semi IP Hub.

How should engineers evaluate this DMA?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this DMA IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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