Vendor: Algotronix Ltd. Category: Symmetric Crypto

AES-GCM IP Core for 40Gbit/sec packet data

This state of the art implementation of AES-GCM achieves 40Gbit/sec performance on Virtex 5 FPGAs.

Overview

This state of the art implementation of AES-GCM achieves 40Gbit/sec performance on Virtex 5 FPGAs. It implements AES-GCM as specified by the IEEE 802.1ae MACSEC standard.

Achieving 40Gbit/sec throughput on minimum sized packets with minimum inter-packet separation is a challenging task, particularly for an FPGA implementation where there are limitations on maximum clock frequency. The conventional approach to providing high performance on AES is to use a deep pipeline however this is ineffective on worst case traffic since minimum sized packets do not contain enough data to fill the pipeline. This core implements a pipelined and overlapped architecture with a number of proprietary implementation optimisations to deliver the required 40Gbit/sec performance even on worst case traffic.

This core is supplied as VHDL source code with a testbench which implements standard vectors from the GCM specification and a large test suite of vectors derived from a software implementation of AES-GCM.

Key features

  • Cipher Modes: AES-GCM as specified for 802.1ae MACSEC
  • Internal Data Path Width: 128 bits with pipelining and overlapping
  • Functions: Encrypt, Decrypt, Encrypt/Decrypt
  • Key Lengths: 128 bits
  • IV Length: 96 bits

Specifications

Identity

Part Number
AES-GCM-40G
Vendor
Algotronix Ltd.
Type
Silicon IP

Security

Crypto Algorithm
AES

Files

Note: some files may require an NDA depending on provider policy.

Provider

Algotronix Ltd.
HQ: United Kingdom
Algotronix specialises in encryption IP cores and cryptographic protection of design intellectual property. Our customers include many of the largest defense corporations worldwide as well as government departments and companies in the networking, test equipment and gaming industries. Algotronix encryption IP cores are used in equipment deployed by several NATO countries. Algotronix' philosophy is quality over quantity: rather than building a wide range of IP cores we set out to do a small number of carefully chosen cores very well. We have initially focussed on the Advanced Encryption Standard algorithm and worked hard to make sure that our cores provide the highest levels of performance and area efficiency coupled with great flexibility in implementation options to ensure a good match to customer application requirements.

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Frequently asked questions about Symmetric Cryptography IP cores

What is AES-GCM IP Core for 40Gbit/sec packet data?

AES-GCM IP Core for 40Gbit/sec packet data is a Symmetric Crypto IP core from Algotronix Ltd. listed on Semi IP Hub.

How should engineers evaluate this Symmetric Crypto?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Symmetric Crypto IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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