DES Encryption and Decryption Processor
The IP-ALDES core is the VHDL model of the processor, that performs DES encryption and decryption.
Overview
The IP-ALDES core is the VHDL model of the processor, that performs DES encryption and decryption. The model is fully compliant with FIPS46-2.
Key features
- Fully compliant 56-Bit key DES implementation
- Single DES operation
- Encryption and decryption are performed in 16 clock cycles
- Suitable for ECB, CBC, CFB and OFB implementations
- Suitable for Triple-DES implementation
- No dead clock cycles
- Simple interface and timing
- Fully synchronous design
Specifications
Identity
Files
Note: some files may require an NDA depending on provider policy.
Provider
Dedication and receptiveness to customer's needs are of the highest importance to us. Aldec cores are present in the world-famous Design Reuse IP center, and we are currently in the process of joining the Xilinx AllianceCORE program.
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Frequently asked questions about Symmetric Cryptography IP cores
What is DES Encryption and Decryption Processor?
DES Encryption and Decryption Processor is a Symmetric Crypto IP core from Aldec, Inc. listed on Semi IP Hub.
How should engineers evaluate this Symmetric Crypto?
Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Symmetric Crypto IP.
Can this semiconductor IP be compared with similar products?
Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.