Vendor: Codasip Category: CPU

64-bit RISC-V Application Processor Core

The A70 is a 64-bit RISC-V application processor aimed at systems running Linux.

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Overview

The A70 is a powerful 64-bit RISC-V application processor aimed at systems running Linux. The core has an in-order 7-stage pipeline enabling greater than 1 GHz frequencies in 22nm HPC.
The core includes integrated L1 data and instruction caches, an interrupt controller and RISC-V Debug module optionally with PC trace.
Like all Codasip RISC-V cores it is possible to create custom instructions using Codasip Studio to extend the ISA and to generate corresponding hardware and software development kits.
Tensor Flow Lite Micro is supported

Key features

  • 64-bit RISC-V core
    • RV64GC (GC=IMAFDC)
  • Linux capable
  • In-order 7-stage pipeline
  • RISC-V mode support:
    • Machine
    • Supervisor
    • User
  • Internal interrupt controller
    • Up to 256 sources
  • Dynamic jump prediction
  • Optional FPU
  • Integrated L1 data and instruction caches
  • MMU
  • On-chip debugger
    • JTAG and RISC-V Debug module
  • >1GHz clock in 22 nm

Block Diagram

Codasip A70 block diagram

Benefits

  • Performance
    • High computational throughput with 7-stage pipeline and branch predictor
    • Support for RISC-V single and double precision FPU
    • Linux-ready with instruction cache, data cache and MMU
  • Extensibility
    • Ability to create custom RISC-V extensions to optimise performance
    • Efficient architectural exploration of custom extensions with Studio
    • Automatic HDK and SDK generation from Studio
    • Rigorous verification of modified core using UVM

Applications

  • Routers,
  • switches,
  • consumer electronics,
  • industrial

What’s Included?

  • Human-readable and structured RTL in either:
    • Verilog
    • VHDL
    • System Verilog
  • Hardware development kit (HDK)
    • Synthesis scripts
    • Simulation testbenches
    • Debug support
  • Software development kit (SDK)
    • GCC C-compiler
    • Assembler
    • Disassembler
    • Linker
    • Instruction-accurate simulator
    • Cycle-accurate simulator
    • Profiler
  • Options for extending A70
    • CodAL model for Codasip Studio
    • Full-feature Studio tool for extending A70X core
    • GUI for rapid development and debugging
    • Automatic HDK & SDK generation

Files

Product Sheet Download

Note: some files may require an NDA depending on provider policy.

Specifications

Identity

Part Number
Codasip A70
Vendor
Codasip

Provider

Codasip
HQ: Germany
With semiconductor scaling failing, it is becoming necessary to design specialised cores optimised to a particular workload. With its open and modular ISA, RISC-V is a good basis on which to build a domain-specific accelerator. Codasip’s family of RISC-V cores covers the range from simple embedded applications to application processors capable of running Linux. The cores offer a variety of different pipeline lengths and computational options. These cores can be supplied in standard off-the-shelf configurations or can be extended using the Codasip Studio tool to achieve your unique processing requirements. Codasip Studio – used to develop the Codasip RISC-V cores – allows hardware and software design kits to be automatically generated from a high-level processor description language. Codasip began operations as a spinout from the Brno University of Technology/Faculty of Information Technology in 2014 based on 10 years of research. Codasip is a founding member of the RISC-V International and was the first company to offer a commercial RISC-V IP core in 2015. Today in addition to the original R & D centre in Brno, Czech Republic, Codasip has design centres in France and the UK. Codasip has sales offices in Europe, North America, China, Japan and Korea.
Contact Codasip

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What is 64-bit RISC-V Application Processor Core?

64-bit RISC-V Application Processor Core is a CPU IP core from Codasip listed on Semi IP Hub.

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