Vendor: Jacobs Pineda, Inc. Category: DSP Core

3-D Audio Processing Core

The J5 is a core cell design of an application specific signal processor which performs both Trusurround(TM) and SRS® 3-D audio v…

Overview

The J5 is a core cell design of an application specific signal processor which performs both Trusurround(TM) and SRS® 3-D audio virtualization processing in a single design. The 3-D processing allows users to enjoy benefits of a multi-channel sound source with only two reporduction channels.  For Dolby Digital® (AC-3) sources, the J5 accepts full 6-channel PCM inputs and performs the 3-D processing to produce output Left/Right signals.  Similarly, for decoded ProLogic(TM) sources, the J5 accepts a 4-channel PCM input (L,C,R,S) and produces the same stereo output.  When played through a conventional stereo sound system the user experiences virtualized multi-channel sound, as if the reproduction system was playing all 4 or 6 channels.  In SRS® 3-D mode, the J5 accepts a stereo PCM input and implements the SRS Labs 3-D algorithm to further spatialize the signal.  The J5 downmixing capability produces stereo output in bypass mode.  There is also a simple LR bypass mode which simply passes L/R inputs to the outputs. Of course, muting is also selectable.  The J5 audio quality meets the highest standards, allowing it to be used for the most demanding audio applications.  The 20-bit PCM output yields a high level of matching to the SRS specifications for Trusurround, and adds negligible quantization error.  High precision is maintained internal to the J5.
 

SYSTEM FEATURES

Functional Specifications

SRS Trusurround (TM)

  • Conforms to SRS Labs Trusurround Specifications.
  • Sampling rates: 48 kHz, 44.1 kHz, 32 kHz
  • 4 or 6-channel input (Prologic compatible)
  • Optional Passive Matrix decoding for matrix encoded stereo inputs

SRS® 3-D

  • Conforms to SRS Labs Trusurround Specifications in SRS 3D mode.
  • Sampling rates: 48 kHz, 44.1 kHz, 32 kHz
  • 2-channel input/output

Matrix Decoding

  • Allows stereo matrix encoded input to be passive matrix decoded to 4-channels   using  sum/difference matrix.
  • Resulting 4 channel output is then  Trusurround processed.

Bypass Modes / Muting / Test

  • Performs downmix of 4/6 channel inputs to stereo outputs using simple matrix.
  • Pass through mode: Left/Right Bypass
  • I/O:  20- bit input PCM
  • Selectable muting on any input/output  channel.
  • Complete testing features for certification testing.

Other optional serial interface modules are available for I2C (control) and 3-wire digital audio (PCM 16-24 bit sources) protocols.

ECONOMICAL VLSI CORE CELL

In order to achive the lowest incremental cost for 3-D audio processing, the J5 has been designed for efficient integration with other functions, like Dolby Digital audio decoding and D/A converters.  Processing is performed entirely in the digital domain, and the J5 is made up of a single logic block and small local RAM, to minimize interblock routing requirements.

The complete dual-standard J5 core, including RAM, requires a silicon area of less than 0.5 mmin a typical 0.35u CMOS processes. The J5 design incorporates all buffering and interface logic, so that it may be used in a wide variety of applications with no additional logic or buffering.

The J5 has a number of operating modes which make it compatible with digital audio sources of 2,4, or 6 channels.

DESIGN KIT

The J5 design kit is compatible with Synopsys and Verilog design methodology. J5 requires 0.35 micron or better technology, and is designed for synthesis with off-the-shelf gate array or standard cell ASIC libraries. 

ANALOG OUTPUT/ COMPRESSED INPUT

By combining the J5 core with the Jacobs Pineda, Inc. JDA1 DAC/PLL core, and the Jacobs Pineda, Inc. J1 Dolby Digital/MPEG Audio Decoder, a complete audio 3-D  subsystem can be built for DVD applications, accepting AC-3/MPEG digital audio in, and producing 3-D virtualized stereo analog and S/PDIF outputs with a single clock source.

CLOCK FREQUENCY

The J5 is designed to operate with a master clock rate of at least 13.5MHz.  It may be also be synthesized to operate at 27MHz, 54MHz, or higher, depending on the target technology.

Key features

  • 20 bit stereo PCM input/output
  • Downmixes to virtualized stereo
  • Implements SRS Labs Trusurround(TM) 3-D
  • Implements SRS Labs SRS 3D® also
  • 6,4(Pro-Logic), or 2(stereo) channel PCM In
  • Selectable Passive Matrix decoder
  • Bypass downmix mode
  • High performce datapath
  • Low cost two block architecture
  • Full Test mode capabilities for SRS testing
  • Pre-certified by SRS Labs, Inc.

Block Diagram

Specifications

Identity

Part Number
J5
Vendor
Jacobs Pineda, Inc.
Type
Silicon IP

Files

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Provider

Jacobs Pineda, Inc.
HQ: USA
Jacobs Pineda, Inc. specializes in VLSI designs for high volume, cost sensitive, consumer audio applications requiring AC-3, MPEG, DVD, DAC, PLL and 3-D functions. Our flagship product is the J1 Dolby Digital®/AC-3/MPEG Audio Decoding Core Cell, which is the world's smallest, with a silicon area of only 2.0 sqmm (0.25u CMOS). Our mission is to give our licensees a definitive advantage over their competition by providing them with the industry's most cost-effective audio VLSI designs. Our designs are currently licensed and employed by Fortune 500 semiconductor and system manufacturers of audio products for the consumer and computing markets

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Frequently asked questions about DSP Core IP cores

What is 3-D Audio Processing Core?

3-D Audio Processing Core is a DSP Core IP core from Jacobs Pineda, Inc. listed on Semi IP Hub.

How should engineers evaluate this DSP Core?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this DSP Core IP.

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