Vendor: Ceva, Inc. Category: DSP Core

5G IoT DSP

The XC21 is the most efficient vector DSP core available today for communications applications.

Overview

The XC21 is the most efficient vector DSP core available today for communications applications.

The XC21 DSP is designed for low-power, cost- and size-optimized cellular IoT modems, NTN VSAT terminals, eMBB and uRLLC applications. Ceva-XC21 offers scalable architecture and dual thread design with support for AI, addressing growing demand for smarter, yet more cost and power efficient cellular devices

Targeted for 5G and 5G-Advanced workloads, the XC21 has multiple products configurations enabling system designers to optimize the size and cost to their specific application needs.

The Solution

The Ceva-XC21, based on the advanced Ceva-XC20 architecture, features a product line of 3 vector DSP cores. Each of the cores offers a unique performance & area configuration with a SW compatibility between them. The different cores span across single thread or dual thread configurations, and 32 or 64 16bits x 16bits MACs.

The Ceva-XC212, the highest performing variant of the Ceva-XC21 delivers up to 1.8x times the performance of Ceva’s previous-generation Ceva-XC4500 architecture, while reducing the core area.

Ceva-XC210, the smallest configuration of the Ceva-XC21, enables system designers to reduce the core die size in 48% compared with the previous generation.

Ceva-XC211 offers the same performance envelope compared with the previous generation at 63% of the area.

Key features

  • True dual-threaded hardware, including dual processing elements and dual instruction and data memory subsystems for contention-free multithread execution
  • AI workloads support with INT8/16/32 data types
  • Supports half-precision, single-precision, and double-precision floating point
  • Advanced pipeline implementation assures high clock frequencies
  • Low power operating modes for system power optimizations
  • Nine-issue VLIW instruction set architecture and optimizing LLVM C compiler deliver high throughput without extensive assembly coding
  • Up to six AXI4 bus connections in AMBA matrix interconnect architecture assure enormous bandwidth but simple, standards-compliant interfacing.
  • Dedicated 5G / 5G-Advanced ISA for 5G NR acceleration
  • ETM compliance, JTAG, RTT, Profiler, APB slave

Block Diagram

Benefits

  • The Ceva-XC21 DSP offers exceptional efficiency in terms of power, performance, and area, making it ideal for 4G, 5G, and 5G-Advanced NR implementations. With AI support and programmability, these DSPs not only enhance modem performance but also enable advanced AI and ML workloads.
  • The Ceva-XC21 is software compatible with the Ceva-XC4500 and provides scalable performance across various 5G profiles, targeting cost and size constrained devices such as mMTC, eRedCap and RedCap. With a high control code performance of 5.14 CoreMark/MHz, it ensures top-notch performance. The core features a unified programming model across all Ceva-XC20 variants and supports low power modes for system power optimization. The design allows for easy integration into SoCs with standard AMBA4 buses. Additionally, the complete software tool chain includes an optimizing LLVM C compiler for high-level programming, and best-in-class debug capabilities for effective system development.

Applications

  • Infrastructure
  • Industrial 
  • Consumer IoT

Specifications

Identity

Part Number
Ceva-XC21
Vendor
Ceva, Inc.
Type
Silicon IP

Files

Note: some files may require an NDA depending on provider policy.

Provider

Ceva, Inc.
HQ: USA
Ceva powers the Smart Edge, bridging the digital and physical worlds to bring AI-driven products to life. Our Ceva AI fabric portfolio of silicon and software IP enables devices to Connect, Sense, and Infer – the essential capabilities for the intelligent edge. From 5G, cellular IoT, Bluetooth, Wi-Fi, and UWB connectivity to scalable Edge AI NPUs, AI DSPs, sensor fusion processors and embedded software, Ceva provides the foundational IP for devices that connect, understand their environment, and act in real time. With more than 21 billion devices shipped and trusted by 400+ customers worldwide, Ceva is the backbone of today’s most advanced smart edge products – from AI-infused wearables and IoT devices to autonomous vehicles and 5G infrastructure. Our differentiated solutions deliver seamless integration into existing design flows, total flexibility to combine solutions based on design needs and ultra–low–power performance in minimal silicon footprint, helping customers accelerate development, reduce risk, and bring innovative products to market faster. As technology evolves toward Physical AI, Ceva’s IP portfolio lays the foundation for systems that are always connected, contextually aware, and capable of intelligent, real-time decision-making.

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Architecture Oriented C Optimizations

Know your hardware! That’s what it’s all about. Using programming guidelines derived from the processor’s architecture can dramatically improve performance of C applications. In some cases, it can even make the difference between having the application implemented in C and having it implemented in assembly. Well written C code and an advanced compiler that utilizes various architectural features often reach performance results similar to those of hand written assembly code.

Frequently asked questions about DSP Core IP cores

What is 5G IoT DSP?

5G IoT DSP is a DSP Core IP core from Ceva, Inc. listed on Semi IP Hub.

How should engineers evaluate this DSP Core?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this DSP Core IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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