The xSPI PHY is designed to work with both the xSPI/PSRAM and the xSPI master host controller IPs.
- SPI / QSPI XSPI
The xSPI PHY is designed to work with both the xSPI/PSRAM and the xSPI master host controller IPs.
This IP integrates both xSPI (Expanded Serial Peripheral Interface) and eMMC 5.1 PHY (Physical Layer) into a single unified solut…
xSPI Multiple Bus Memory Controller
The industry ‘defacto standard’ memory controller for xSPI-like memories: HyperBus™ 1.0, 2.0 and 3.0 – OctaBus™ – Xccela® Bus – O…
xSPI, HyperBus™, and Xccela™ Serial Memory Controller
The xSPI-MC core is a versatile serial/SPI memory controller, which allows a system to easily detect and access the attached memo…
With growing demand for flash memory in automotive, IoT, and consumer applications, the Host Controller IP for xSPI offers up to …