Synopsys, Inc.
•
HQ:
USA
Designers face the challenge of creating secure, cost-effective, low power, and reliable SoC designs.
- eFuse / OTP
Compare 188 TSMC N5 IP Listing from 5 vendors
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ONFI IO v5.1, 3.6GT/s, TSMC N5, 1.2V, N/S orientation, H&V cell
M31 Technology Corp.• HQ: TaiwanONFI I/O is a non-volatile memory interface technology with high bandwidth capabilities, mainly developed for flash storage appli…
- Single-Protocol PHY
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eUSB2 v1.1 Dual-Role, repeater/native mode PHY, TSMC N5, 1.2V, N/S orientation
M31 Technology Corp.• HQ: TaiwanEmbedded USB2 (eUSB2) is a new generation specification proposed by USB Association that extends USB 2.0 specification and uses 1…
- Single-Protocol PHY
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USB4 Gen3 x2-lane PHY, TSMC N5, 1.2V, N/S orientation, type-C
M31 Technology Corp.• HQ: TaiwanThe USB4 Gen3x2 transceiver IP provides a range of USB4 Gen3x2 host and peripheral applications up to 40Gbps.
- TSMC
- 3nm
- N3X
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Synopsys, Inc.• HQ: USA
The Catastrophic Trip Sensor has been specifically designed to protect against thermal runaway and comprises a central hub and a …
- Temperature Sensor
- Available on Request
- Available
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Synopsys, Inc.• HQ: USA
The LPDDR6/5X/5 PHY IP enables ASICs, ASSPs, system-on-chips (SoCs), and system-in-package applications requiring high-performanc…
- Single-Protocol PHY
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TSMC N5 1.2V/1.5V/1.8V GPIO Platform MS Add-on
Synopsys, Inc.• HQ: USASynopsys’ General-Purpose I/O (GPIO) Library IP provides designers with the input/output operation, functionality, and reliabilit…
- TSMC
- 5nm
- N5
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TSMC N5 1.2V/1.5V/1.8V GPIO Platform
Synopsys, Inc.• HQ: USASynopsys’ General-Purpose I/O (GPIO) Library IP provides designers with the input/output operation, functionality, and reliabilit…
- TSMC
- 5nm
- N5
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TSMC N5 1.2V/1.8V GPIO Platform MS Add-on
Synopsys, Inc.• HQ: USASynopsys’ General-Purpose I/O (GPIO) Library IP provides designers with the input/output operation, functionality, and reliabilit…
- TSMC
- 5nm
- N5
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TSMC N5 1.2V/1.8V GPIO Library with 1.8V Failsafe MS add on
Synopsys, Inc.• HQ: USASynopsys’ General-Purpose I/O (GPIO) Library IP provides designers with the input/output operation, functionality, and reliabilit…
- TSMC
- 5nm
- N5
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TSMC N5 1.2V/1.8V GPIO Library with 1.8V Failsafe
Synopsys, Inc.• HQ: USASynopsys’ General-Purpose I/O (GPIO) Library IP provides designers with the input/output operation, functionality, and reliabilit…
- TSMC
- 5nm
- N5
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TSMC N5 1.2V/1.8V GPIO Platform
Synopsys, Inc.• HQ: USASynopsys’ General-Purpose I/O (GPIO) Library IP provides designers with the input/output operation, functionality, and reliabilit…
- TSMC
- 5nm
- N5
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TSMC N5 1.2V/1.8V/2.5V GPIO Library with 2.5V Failsafe
Synopsys, Inc.• HQ: USASynopsys’ General-Purpose I/O (GPIO) Library IP provides designers with the input/output operation, functionality, and reliabilit…
- TSMC
- 5nm
- N5
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TSMC N5 1.2V/1.8V SD/eMMC IO MS Add-on
Synopsys, Inc.• HQ: USASynopsys SD/eMMC PHY provides an optimal balance for cost and performance for storage solutions.
- TSMC
- 5nm
- N5
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Synopsys, Inc.• HQ: USA
Synopsys SD/eMMC PHY provides an optimal balance for cost and performance for storage solutions.
- TSMC
- 5nm
- N5
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TSMC N5 SD/eMMC IO North/South Poly Orientation MS
Synopsys, Inc.• HQ: USASynopsys SD/eMMC PHY provides an optimal balance for cost and performance for storage solutions.
- TSMC
- 5nm
- N5
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Synopsys, Inc.• HQ: USA
Contain supply cells, power management, ring building, analog cells for TSMC N5 1.8V IO, New Frame Additional MS
- TSMC
- 5nm
- N5
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Synopsys, Inc.• HQ: USA
Contain supply cells, power management, ring building, analog cells for TSMC N5 1.8V IO Platform, New Frame
- TSMC
- 5nm
- N5
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Support cells for TSMC N5 2.5V IO Platform MS
Synopsys, Inc.• HQ: USASupport cells for TSMC N5 2.5V IO Platform MS
- TSMC
- 5nm
- N5
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Contain supply cells, power management, ring building, analog cells for TSMC N5 1.8V IO Platform MS
Synopsys, Inc.• HQ: USAContain supply cells, power management, ring building, analog cells for TSMC N5 1.8V IO Platform MS
- TSMC
- 5nm
- N5