PCIe Gen5 PHY, x2-lane, RC/EP, TSMC 12FFC, N/S orientation
The PCIe 5.0 PHY IP provides high-performance, multi-lane capability and low power architecture for high-bandwidth applications.
- TSMC
- 12nm
- FFC
PCIe Gen5 PHY, x2-lane, RC/EP, TSMC 12FFC, N/S orientation
The PCIe 5.0 PHY IP provides high-performance, multi-lane capability and low power architecture for high-bandwidth applications.
PCIe 5.0 Serdes PHY IP, Silicon Proven in TSMC 16FFC
For high-bandwidth applications, the PCIe 5.0 PHY IP offers excellent performance, multi-lane capabilities, and low power design.
Rambus PCIe 1.1 Controller with AXI is a configurable and scalable PCIe controller Soft IP designed for ASIC and FPGA implementat…