Zixin Microelectronics Technology Co. Ltd.
•
HQ:
Unknown
Fully compliant with the DFI 4.0
- DDR
- Fully compliant with the DF…
Compare 429 DDR controller/PHY IP Listing from 28 vendors
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LPDDR5X/5/4X/4 combo PHY at Samsung SF5A
OPENEDGES Technology, Inc.• HQ: KoreaOPENEDGES, the memory system IP provider, including DDR memory controller, DDR PHY, on-chip interconnect, and NPU IP together as …
- Samsung
- 5nm
- SF5
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LPDDR5/4x/4 PHY IP for Samsung 14LPU
OPENEDGES Technology, Inc.• HQ: KoreaOPENEDGES, the memory system IP provider, including DDR memory controller, DDR PHY, on-chip interconnect, and NPU IP together as …
- Samsung
- 14nm
- Silicon Proven
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OPENEDGES Technology, Inc.• HQ: Korea
OPENEDGES, the memory system IP provider, including DDR memory controller, DDR PHY, on-chip interconnect, and NPU IP together as …
- LPDDR
- Silicon proven
- Now
- JEDEC, JESD209-4C, LPDDR4x/4
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LPDDR5X/5/4X/4 combo PHY at 7nm
OPENEDGES Technology, Inc.• HQ: KoreaOPENEDGES, the memory system IP provider, including DDR memory controller, DDR PHY, on-chip interconnect, and NPU IP together as …
- LPDDR
- Silicon Proven
- Now
- JEDEC, JESD209-5A, JESD209-…
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LPDDR5/4x/4 combo PHY on 14nm, 12nm
OPENEDGES Technology, Inc.• HQ: KoreaOPENEDGES, the memory system IP provider, including DDR memory controller, DDR PHY, on-chip interconnect, and NPU IP together as …
- Single-Protocol PHY
- Silicon Proven
- Now
- JEDEC, JESD209-5B, JESD209-…
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OPENEDGES Technology, Inc.• HQ: Korea
OPENEDGES, the memory system IP provider, including DDR memory controller, DDR PHY, on-chip interconnect, and NPU IP together as …
- GDDR
- Silicon Proven
- Now
- JEDEC, JESD250, GDDR6
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Denali High-Speed DDR PHY for SMIC
Cadence Design Systems, Inc.• HQ: USAProvides the industry's highest data rates with low-latency througput while balancing power consumption and minimizing area Devel…
- Single-Protocol PHY
- Available on request
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Denali High-Speed DDR PHY for TSMC 22ULP
Cadence Design Systems, Inc.• HQ: USALowest latency and highest data rates for data-intensive applications Developed by experienced teams with industry- domain expert…
- TSMC
- 22nm
- ULP
- Available on request
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Denali High-Speed DDR PHY for UMC
Cadence Design Systems, Inc.• HQ: USAProvides the industry's highest data rates with low-latency througput while balancing power consumption and minimizing area Devel…
- UMC
- 28nm
- Available on request
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High Speed DDR Interface Solution
Brite Semiconductor• HQ: ChinaBrite provides a DDR subsystem including not only controller, PHY and IO, but also corresponding tuning and configuration softwar…
- Single-Protocol PHY
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DDR Secure Controller supporting DDR5
Synopsys, Inc.• HQ: USAThe DDR5/4 Controller is a next-generation memory controller optimized for latency, bandwidth, and area, supporting JEDEC standar…
- DDR
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DDR Low Latency Controller supporting DDR5
Synopsys, Inc.• HQ: USAThe DDR5/4 Controller is a next-generation memory controller optimized for latency, bandwidth, and area, supporting JEDEC standar…
- DDR
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DDR Controller supporting DDR5 with Advanced Features Package
Synopsys, Inc.• HQ: USAThe DDR5/4 Controller is a next-generation memory controller optimized for latency, bandwidth, and area, supporting JEDEC standar…
- DDR
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DDR Controller supporting DDR5 with a CHI interface and Advanced Feature Package
Synopsys, Inc.• HQ: USAThe DDR5/4 Controller is a next-generation memory controller optimized for latency, bandwidth, and area, supporting JEDEC standar…
- DDR
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DDR Controller supporting DDR5 MRDIMM Gen2 with Advanced Features Package
Synopsys, Inc.• HQ: USAThe DDR5/4 Controller is a next-generation memory controller optimized for latency, bandwidth, and area, supporting JEDEC standar…
- DDR
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DDR Controller supporting DDR5 and DDR4 with Advanced Features Package
Synopsys, Inc.• HQ: USAThe DDR5/4 Controller is a next-generation memory controller optimized for latency, bandwidth, and area, supporting JEDEC standar…
- DDR
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DDR Controller supporting DDR5 and DDR4 with a CHI interface and Advanced Feature Package
Synopsys, Inc.• HQ: USAThe DDR5/4 Controller is a next-generation memory controller optimized for latency, bandwidth, and area, supporting JEDEC standar…
- DDR
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DDR Controller supporting DDR5 and DDR4 with a CHI interface
Synopsys, Inc.• HQ: USAThe DDR5/4 Controller is a next-generation memory controller optimized for latency, bandwidth, and area, supporting JEDEC standar…
- DDR
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DDR Controller supporting DDR5 and DDR4
Synopsys, Inc.• HQ: USAThe DDR5/4 Controller is a next-generation memory controller optimized for latency, bandwidth, and area, supporting JEDEC standar…
- DDR