8-bit <=120GSa/s Ultra-high-speed DAC in TSMC 16nm CMOS
DAC IP Macro.
- 8 Bit
- TSMC
- 16nm
- Silicon Proven
8-bit <=120GSa/s Ultra-high-speed DAC in TSMC 16nm CMOS
DAC IP Macro.
8-bit <=25GSa/s High-speed Low power ADC in 16nm TSMC CMOS
Originally developed for high speed optical communication systems but used in many other applications Low power consumption Small…
8-bit <=51GSa/s Ultra-high-speed ADC in 16nm TSMC CMOS
Originally developed for high speed optical communication systems but used in many other applications Low power consumption Small…
8-bit >100GSa/s Ultra-high-speed ADC in 16nm TSMC CMOS
ADC IP Macro.
PCIe 2.0 Serdes PHY IP, Silicon Proven in TSMC 16FFC
The whole spectrum of PCIe 2.0 Base applications is offered by PCIe 2.0 transceiver IP.
PCIe 3.0 Serdes PHY IP, Silicon Proven in TSMC 16FFC
High-bandwidth applications can avail advantage of PCIe 3.0 PHY IP's high performance, multi-lane scalability, and low-power layo…
PCIe 4.0 Serdes PHY IP, Silicon Proven in TSMC 16FFC
For high-bandwidth applications, the PCIe 4.0 PHY IP delivers high-performance, multi-lane capabilities and a low-power design.
PCIe 5.0 Serdes PHY IP, Silicon Proven in TSMC 16FFC
For high-bandwidth applications, the PCIe 5.0 PHY IP offers excellent performance, multi-lane capabilities, and low power design.
TSMC CLN16FF+GLLVT 16nm Ultra PLL - 15MHz-3000MHz
The Ultra PLL is designed with a architecture using high-speed digital and analog circuits that offers exceptional performance, f…
TSMC CLN16FF+LLLVT 16nm Ultra PLL - 15MHz-3000MHz
The Ultra PLL is designed with a architecture using high-speed digital and analog circuits that offers exceptional performance, f…
TSMC CLN16FFCLLLVT 16nm Ultra PLL - 15MHz-3000MHz
The Ultra PLL is designed with a architecture using high-speed digital and analog circuits that offers exceptional performance, f…
TSMC CLN16FF+GLLVT 16nm Clock Generator PLL - 300MHz-1500MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096.
TSMC CLN16FF+GLLVT 16nm Clock Generator PLL - 600MHz-3000MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096.
TSMC CLN16FF+GLLVT 16nm Clock Generator PLL - 1200MHz-6000MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096.
TSMC CLN16FF+LLLVT 16nm Clock Generator PLL - 300MHz-1500MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096.
TSMC CLN16FF+LLLVT 16nm Clock Generator PLL - 600MHz-3000MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096.
TSMC CLN16FF+LLLVT 16nm Clock Generator PLL - 1200MHz-6000MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096.
TSMC CLN16FFCLLLVT 16nm Clock Generator PLL - 300MHz-1500MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096.
TSMC CLN16FFCLLLVT 16nm Clock Generator PLL - 600MHz-3000MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096.
TSMC CLN16FFCLLLVT 16nm Clock Generator PLL - 1200MHz-6000MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096.