Vendor: Allegro DVT Category: Video Processing

Video Encoder IP optimized for HD use cases

The E100 Series of Encoder IP enables HD/1080P60 resolution encoding up to 5MPixels in a single core.

Overview

The E100 Series of Encoder IP enables HD/1080P60 resolution encoding up to 5MPixels in a single core.

The E100 Series Encoder is built around a true multi format architecture that shares serouces between the H.264, H.265, VP9, AV1, JPEG compression standards, while providing superior video encoding quality. The E100 Series Encoder IP also has multiple new smart encoding features allowing customers to considerably reduce the bitrate to meet their application specific requirements.

Supported formats

  • AV1 Main, High and Professional Profile
  • VP9 Profile 0, Profile 2
  • H.264 Constrained Baseline, Main, Progressive Hight, Pogressive High 10, High, High Predictive, High Intra, CAVLC Intra
  • H.265 Main, Main 10 profiles
  • AV1 Main and professional Profile
  • VP9 Profile 0, Profile 1, Profile 2
  • JPEG Baseline lossless

Interfaces

  • AMBA APB interface for control registers
  • AMBA AXI interfaces for data access

Key features

  • Ultra low latency coding
  • Source input compression
  • Dynamic changes of the encoding parameters
  • Advanced coding tools (LookAhead,…)
  • Smart encoding tools (ROI,…)
  • Video surveillance features
  • Color space conversion
  • Bit depth conversion
  • Chroma format conversion

Benefits

  • 2D/3D Noise Reduction Filter (NRF)
  • Optimized frame buffer footprint
  • Low Power (reduced frequency operation)
  • Scalable up to 5 megapixels resolution
  • High video encoding quality
  • Fast and easy integration within a wide range of System-On-Chip (SoC) designs
  • Independent entity, requiring minimum support from the SoC embedded CPU

What’s Included?

  • RTL source code
  • C control software
  • Bit accurate executable software reference model
  • Documentation

Files

Note: some files may require an NDA depending on provider policy.

Specifications

Identity

Part Number
E100 Series
Vendor
Allegro DVT
Type
Silicon IP

Provider

Allegro DVT
HQ: France
Allegro DVT, headquartered in Grenoble, France, is a world leading company offering digital video processing solutions including compliance streams and video codec semiconductor IPs focused on the H.264, HEVC, AVS2/3, VP9, AV1, VVC and LCEVC standards. Founded in 2003, Allegro is today a recognized market leader in video compression technologies and has been chosen by more than 100 major IC providers, OEMs and broadcasters.

Learn more about Video Processing IP core

Picking the right MPSoC-based video architecture: Part 1

A look at the design of multiprocessor systems-on-chips (MPSoCs) for video applications and how to optimize them for computational power and real-time performance as well as flexibility. Part 1: Architectural approaches to video processing

Analysis: ARC's Configurable Video Subsystems

Adding to its growing portfolio of licensable silicon IP subsystems, ARC has announced five configurable video processing subsystems. The subsystems range from the smallest-size AV 402V to the highest-performance AV 417V, and support multi-standard video encoding and decoding at resolutions ranging from CIF to D1.

Frequently asked questions about Video Processing IP

What is Video Encoder IP optimized for HD use cases?

Video Encoder IP optimized for HD use cases is a Video Processing IP core from Allegro DVT listed on Semi IP Hub.

How should engineers evaluate this Video Processing?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Video Processing IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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